diff options
author | Patrice Chotard <patrice.chotard@st.com> | 2019-07-23 15:33:30 +0200 |
---|---|---|
committer | Patrice Chotard <patrice.chotard@st.com> | 2019-08-27 09:36:56 +0200 |
commit | 0203050e57f5e0ad6c696cb64cfbc01fd08b67c5 (patch) | |
tree | 42b84f9b7924544615593e931df476a57ab7d620 /arch/arm/dts/stih407-pinctrl.dtsi | |
parent | 2e01fcf17c221cba2b54d0f238a39f12b0ef361a (diff) |
ARM: dts: stih410-b2260: Sync DT with kernel v5.2
Synchronize U-boot DT with kernel v5.2 for stih410-b2260.
Update stih410-b2260-u-boot.dtsi accordingly.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Diffstat (limited to 'arch/arm/dts/stih407-pinctrl.dtsi')
-rw-r--r-- | arch/arm/dts/stih407-pinctrl.dtsi | 129 |
1 files changed, 44 insertions, 85 deletions
diff --git a/arch/arm/dts/stih407-pinctrl.dtsi b/arch/arm/dts/stih407-pinctrl.dtsi index f27ae21f67..2cf335714c 100644 --- a/arch/arm/dts/stih407-pinctrl.dtsi +++ b/arch/arm/dts/stih407-pinctrl.dtsi @@ -1,10 +1,7 @@ +// SPDX-License-Identifier: GPL-2.0-only /* * Copyright (C) 2014 STMicroelectronics Limited. * Author: Giuseppe Cavallaro <peppe.cavallaro@st.com> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * publishhed by the Free Software Foundation. */ #include "st-pincfg.h" #include <dt-bindings/interrupt-controller/arm-gic.h> @@ -45,18 +42,18 @@ }; soc { - pin-controller-sbc { + pin-controller-sbc@961f080 { #address-cells = <1>; #size-cells = <1>; compatible = "st,stih407-sbc-pinctrl"; st,syscfg = <&syscfg_sbc>; reg = <0x0961f080 0x4>; reg-names = "irqmux"; - interrupts = <GIC_SPI 188 IRQ_TYPE_NONE>; + interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "irqmux"; ranges = <0 0x09610000 0x6000>; - pio0: gpio@09610000 { + pio0: gpio@9610000 { gpio-controller; #gpio-cells = <2>; interrupt-controller; @@ -64,7 +61,7 @@ reg = <0x0 0x100>; st,bank-name = "PIO0"; }; - pio1: gpio@09611000 { + pio1: gpio@9611000 { gpio-controller; #gpio-cells = <2>; interrupt-controller; @@ -72,7 +69,7 @@ reg = <0x1000 0x100>; st,bank-name = "PIO1"; }; - pio2: gpio@09612000 { + pio2: gpio@9612000 { gpio-controller; #gpio-cells = <2>; interrupt-controller; @@ -80,7 +77,7 @@ reg = <0x2000 0x100>; st,bank-name = "PIO2"; }; - pio3: gpio@09613000 { + pio3: gpio@9613000 { gpio-controller; #gpio-cells = <2>; interrupt-controller; @@ -88,7 +85,7 @@ reg = <0x3000 0x100>; st,bank-name = "PIO3"; }; - pio4: gpio@09614000 { + pio4: gpio@9614000 { gpio-controller; #gpio-cells = <2>; interrupt-controller; @@ -97,7 +94,7 @@ st,bank-name = "PIO4"; }; - pio5: gpio@09615000 { + pio5: gpio@9615000 { gpio-controller; #gpio-cells = <2>; interrupt-controller; @@ -369,18 +366,18 @@ }; }; - pin-controller-front0 { + pin-controller-front0@920f080 { #address-cells = <1>; #size-cells = <1>; compatible = "st,stih407-front-pinctrl"; st,syscfg = <&syscfg_front>; reg = <0x0920f080 0x4>; reg-names = "irqmux"; - interrupts = <GIC_SPI 189 IRQ_TYPE_NONE>; + interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "irqmux"; ranges = <0 0x09200000 0x10000>; - pio10: pio@09200000 { + pio10: pio@9200000 { gpio-controller; #gpio-cells = <2>; interrupt-controller; @@ -388,7 +385,7 @@ reg = <0x0 0x100>; st,bank-name = "PIO10"; }; - pio11: pio@09201000 { + pio11: pio@9201000 { gpio-controller; #gpio-cells = <2>; interrupt-controller; @@ -396,7 +393,7 @@ reg = <0x1000 0x100>; st,bank-name = "PIO11"; }; - pio12: pio@09202000 { + pio12: pio@9202000 { gpio-controller; #gpio-cells = <2>; interrupt-controller; @@ -404,7 +401,7 @@ reg = <0x2000 0x100>; st,bank-name = "PIO12"; }; - pio13: pio@09203000 { + pio13: pio@9203000 { gpio-controller; #gpio-cells = <2>; interrupt-controller; @@ -412,7 +409,7 @@ reg = <0x3000 0x100>; st,bank-name = "PIO13"; }; - pio14: pio@09204000 { + pio14: pio@9204000 { gpio-controller; #gpio-cells = <2>; interrupt-controller; @@ -420,7 +417,7 @@ reg = <0x4000 0x100>; st,bank-name = "PIO14"; }; - pio15: pio@09205000 { + pio15: pio@9205000 { gpio-controller; #gpio-cells = <2>; interrupt-controller; @@ -428,7 +425,7 @@ reg = <0x5000 0x100>; st,bank-name = "PIO15"; }; - pio16: pio@09206000 { + pio16: pio@9206000 { gpio-controller; #gpio-cells = <2>; interrupt-controller; @@ -436,7 +433,7 @@ reg = <0x6000 0x100>; st,bank-name = "PIO16"; }; - pio17: pio@09207000 { + pio17: pio@9207000 { gpio-controller; #gpio-cells = <2>; interrupt-controller; @@ -444,7 +441,7 @@ reg = <0x7000 0x100>; st,bank-name = "PIO17"; }; - pio18: pio@09208000 { + pio18: pio@9208000 { gpio-controller; #gpio-cells = <2>; interrupt-controller; @@ -452,7 +449,7 @@ reg = <0x8000 0x100>; st,bank-name = "PIO18"; }; - pio19: pio@09209000 { + pio19: pio@9209000 { gpio-controller; #gpio-cells = <2>; interrupt-controller; @@ -465,19 +462,16 @@ serial0 { pinctrl_serial0: serial0-0 { st,pins { - tx = <&pio17 0 ALT1 OUT>; - rx = <&pio17 1 ALT1 IN>; + tx = <&pio17 0 ALT1 OUT>; + rx = <&pio17 1 ALT1 IN>; }; }; - pinctrl_serial0_rts: serial0_rts { - st,pins { - rts = <&pio17 3 ALT1 OUT>; - }; - }; - - pinctrl_serial0_cts: serial0_cts { + pinctrl_serial0_hw_flowctrl: serial0-0_hw_flowctrl { st,pins { + tx = <&pio17 0 ALT1 OUT>; + rx = <&pio17 1 ALT1 IN>; cts = <&pio17 2 ALT1 IN>; + rts = <&pio17 3 ALT1 OUT>; }; }; }; @@ -932,18 +926,18 @@ }; }; - pin-controller-front1 { + pin-controller-front1@921f080 { #address-cells = <1>; #size-cells = <1>; compatible = "st,stih407-front-pinctrl"; st,syscfg = <&syscfg_front>; reg = <0x0921f080 0x4>; reg-names = "irqmux"; - interrupts = <GIC_SPI 190 IRQ_TYPE_NONE>; + interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "irqmux"; ranges = <0 0x09210000 0x10000>; - pio20: pio@09210000 { + pio20: pio@9210000 { gpio-controller; #gpio-cells = <2>; interrupt-controller; @@ -965,18 +959,18 @@ }; }; - pin-controller-rear { + pin-controller-rear@922f080 { #address-cells = <1>; #size-cells = <1>; compatible = "st,stih407-rear-pinctrl"; st,syscfg = <&syscfg_rear>; reg = <0x0922f080 0x4>; reg-names = "irqmux"; - interrupts = <GIC_SPI 191 IRQ_TYPE_NONE>; + interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "irqmux"; ranges = <0 0x09220000 0x6000>; - pio30: gpio@09220000 { + pio30: gpio@9220000 { gpio-controller; #gpio-cells = <2>; interrupt-controller; @@ -984,7 +978,7 @@ reg = <0x0 0x100>; st,bank-name = "PIO30"; }; - pio31: gpio@09221000 { + pio31: gpio@9221000 { gpio-controller; #gpio-cells = <2>; interrupt-controller; @@ -992,7 +986,7 @@ reg = <0x1000 0x100>; st,bank-name = "PIO31"; }; - pio32: gpio@09222000 { + pio32: gpio@9222000 { gpio-controller; #gpio-cells = <2>; interrupt-controller; @@ -1000,7 +994,7 @@ reg = <0x2000 0x100>; st,bank-name = "PIO32"; }; - pio33: gpio@09223000 { + pio33: gpio@9223000 { gpio-controller; #gpio-cells = <2>; interrupt-controller; @@ -1008,7 +1002,7 @@ reg = <0x3000 0x100>; st,bank-name = "PIO33"; }; - pio34: gpio@09224000 { + pio34: gpio@9224000 { gpio-controller; #gpio-cells = <2>; interrupt-controller; @@ -1016,7 +1010,7 @@ reg = <0x4000 0x100>; st,bank-name = "PIO34"; }; - pio35: gpio@09225000 { + pio35: gpio@9225000 { gpio-controller; #gpio-cells = <2>; interrupt-controller; @@ -1026,41 +1020,6 @@ st,retime-pin-mask = <0x7f>; }; - dvo { - pinctrl_dvo: dvo { - st,pins { - hs = <&pio30 0 ALT2 OUT SE_NICLK_IO 0 CLK_A>; - vs = <&pio30 1 ALT2 OUT SE_NICLK_IO 0 CLK_A>; - de = <&pio30 2 ALT2 OUT SE_NICLK_IO 0 CLK_A>; - ck = <&pio30 3 ALT2 (OE | CLKNOTDATA) 0>; - d0 = <&pio30 4 ALT2 OUT SE_NICLK_IO 0 CLK_A>; - d1 = <&pio30 5 ALT2 OUT SE_NICLK_IO 0 CLK_A>; - d2 = <&pio30 6 ALT2 OUT SE_NICLK_IO 0 CLK_A>; - d3 = <&pio30 7 ALT2 OUT SE_NICLK_IO 0 CLK_A>; - d4 = <&pio31 0 ALT2 OUT SE_NICLK_IO 0 CLK_A>; - d5 = <&pio31 1 ALT2 OUT SE_NICLK_IO 0 CLK_A>; - d6 = <&pio31 2 ALT2 OUT SE_NICLK_IO 0 CLK_A>; - d7 = <&pio31 3 ALT2 OUT SE_NICLK_IO 0 CLK_A>; - d8 = <&pio31 4 ALT2 OUT SE_NICLK_IO 0 CLK_A>; - d9 = <&pio31 5 ALT2 OUT SE_NICLK_IO 0 CLK_A>; - d10 = <&pio31 6 ALT2 OUT SE_NICLK_IO 0 CLK_A>; - d11 = <&pio31 7 ALT2 OUT SE_NICLK_IO 0 CLK_A>; - d12 = <&pio32 0 ALT2 OUT SE_NICLK_IO 0 CLK_A>; - d13 = <&pio32 1 ALT2 OUT SE_NICLK_IO 0 CLK_A>; - d14 = <&pio32 2 ALT2 OUT SE_NICLK_IO 0 CLK_A>; - d15 = <&pio32 3 ALT2 OUT SE_NICLK_IO 0 CLK_A>; - d16 = <&pio32 4 ALT2 OUT SE_NICLK_IO 0 CLK_A>; - d17 = <&pio32 5 ALT2 OUT SE_NICLK_IO 0 CLK_A>; - d18 = <&pio32 6 ALT2 OUT SE_NICLK_IO 0 CLK_A>; - d19 = <&pio32 7 ALT2 OUT SE_NICLK_IO 0 CLK_A>; - d20 = <&pio33 0 ALT2 OUT SE_NICLK_IO 0 CLK_A>; - d21 = <&pio33 1 ALT2 OUT SE_NICLK_IO 0 CLK_A>; - d22 = <&pio33 2 ALT2 OUT SE_NICLK_IO 0 CLK_A>; - d23 = <&pio33 3 ALT2 OUT SE_NICLK_IO 0 CLK_A>; - }; - }; - }; - i2c4 { pinctrl_i2c4_default: i2c4-default { st,pins { @@ -1195,18 +1154,18 @@ }; }; - pin-controller-flash { + pin-controller-flash@923f080 { #address-cells = <1>; #size-cells = <1>; compatible = "st,stih407-flash-pinctrl"; st,syscfg = <&syscfg_flash>; reg = <0x0923f080 0x4>; reg-names = "irqmux"; - interrupts = <GIC_SPI 192 IRQ_TYPE_NONE>; - interrupts-names = "irqmux"; + interrupts = <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "irqmux"; ranges = <0 0x09230000 0x3000>; - pio40: gpio@09230000 { + pio40: gpio@9230000 { gpio-controller; #gpio-cells = <2>; interrupt-controller; @@ -1214,7 +1173,7 @@ reg = <0 0x100>; st,bank-name = "PIO40"; }; - pio41: gpio@09231000 { + pio41: gpio@9231000 { gpio-controller; #gpio-cells = <2>; interrupt-controller; @@ -1222,7 +1181,7 @@ reg = <0x1000 0x100>; st,bank-name = "PIO41"; }; - pio42: gpio@09232000 { + pio42: gpio@9232000 { gpio-controller; #gpio-cells = <2>; interrupt-controller; |