diff options
| author | Patrice Chotard <patrice.chotard@st.com> | 2018-05-14 15:42:57 +0200 |
|---|---|---|
| committer | Jagan Teki <jagan@amarulasolutions.com> | 2018-05-16 18:41:21 +0530 |
| commit | 9582100eeedcf9ab6e6640d2dec8e668225286c8 (patch) | |
| tree | b64a1b72bf57d1cf5900f72aae63baf16969cad3 /arch/arm/dts/stm32f746.dtsi | |
| parent | 5e46123bf3fe2cc67c30f36b64b5d2c460ca5bc9 (diff) | |
ARM: dts: stm32: Add quadspi reset for stm32f746
Add missing reset property in quadspi node.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Diffstat (limited to 'arch/arm/dts/stm32f746.dtsi')
| -rw-r--r-- | arch/arm/dts/stm32f746.dtsi | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/dts/stm32f746.dtsi b/arch/arm/dts/stm32f746.dtsi index 8581df9a27..4845279ccf 100644 --- a/arch/arm/dts/stm32f746.dtsi +++ b/arch/arm/dts/stm32f746.dtsi @@ -92,6 +92,7 @@ interrupts = <92>; spi-max-frequency = <108000000>; clocks = <&rcc 0 STM32F7_AHB3_CLOCK(QSPI)>; + resets = <&rcc STM32F7_AHB3_RESET(QSPI)>; status = "disabled"; }; usart1: serial@40011000 { |