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authorPatrice Chotard <patrice.chotard@st.com>2017-09-13 18:00:11 +0200
committerTom Rini <trini@konsulko.com>2017-09-22 07:40:03 -0400
commita1e384b4d9df74735f02e3b9a2f8f70ff02543a5 (patch)
tree5fe952c79f090f613398da13dfb93bdb4e33d154 /arch/arm/dts/stm32h743i-disco.dts
parent5fbb2b25ae6acc70e47aea78fd63b1c65c87c112 (diff)
ARM: DTS: stm32: adapt stm32h7 dts files for U-boot
This patch adapts stm32h743 disco and eval dts files to match with U-boot requirements or add features wich are not yet upstreamed on kernel side : _ Add RCC clock driver node and update all clocks phandle accordingly. By default, on kernel side, all clocks was temporarly configured as a phandle to timer_clk waiting for a RCC clock driver to be available. On U-boot side, we now have a dedicated RCC clock driver, we can configured all clocks as phandle to this driver. All this binding update will be available soon in a kernel tag, as all the bindings have been acked by Rob Herring [1]. [1] http://lkml.iu.edu/hypermail/linux/kernel/1704.0/00935.html _ Align STM32H7 serial compatible string with the one which will be available in next kernel tag. The bindings has been acked by Rob Herring [2]. This compatible string will be usefull to add stm32h7 specific feature for this serial driver. [2] https://lkml.org/lkml/2017/7/17/739 _ Add gpio compatible and aliases for stm32h743 _ Add FMC sdram node with associated new bindings value to manage second bank (ie bank 1). _ Add missing HSI and CSI oscillators nodes needed by STM32H7 RCC clock driver. Clock sources could be: _ HSE (High Speed External) _ HSI (High Speed Internal) _ CSI (Low Power Internal) These clocks can be used as clocksource in some configuration. By default, HSE is selected as clock source. _ Set HSE to 25Mhz for stm32h743i-disco and eval board By default, the external oscillator frequency is defined at 25 Mhz in SoC stm32h743.dtsi file. It has been set at 125 Mhz in kernel DT temporarly waiting for RCC clock driver becomes available. As in U-boot we got a RCC clock driver, the real value of HSE clock can be used. _ Add "u-boot,dm-pre-reloc" for rcc, fmc, fixed-clock, pinctrl, pwrcfg and gpio nodes. Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'arch/arm/dts/stm32h743i-disco.dts')
-rw-r--r--arch/arm/dts/stm32h743i-disco.dts35
1 files changed, 31 insertions, 4 deletions
diff --git a/arch/arm/dts/stm32h743i-disco.dts b/arch/arm/dts/stm32h743i-disco.dts
index 79e841d940..bef7e90f20 100644
--- a/arch/arm/dts/stm32h743i-disco.dts
+++ b/arch/arm/dts/stm32h743i-disco.dts
@@ -43,6 +43,7 @@
/dts-v1/;
#include "stm32h743.dtsi"
#include "stm32h743-pinctrl.dtsi"
+#include <dt-bindings/memory/stm32-sdram.h>
/ {
model = "STMicroelectronics STM32H743i-Discovery board";
@@ -59,15 +60,41 @@
aliases {
serial0 = &usart2;
+ gpio0 = &gpioa;
+ gpio1 = &gpiob;
+ gpio2 = &gpioc;
+ gpio3 = &gpiod;
+ gpio4 = &gpioe;
+ gpio5 = &gpiof;
+ gpio6 = &gpiog;
+ gpio7 = &gpioh;
+ gpio8 = &gpioi;
+ gpio9 = &gpioj;
+ gpio10 = &gpiok;
};
};
-&clk_hse {
- clock-frequency = <125000000>;
-};
-
&usart2 {
pinctrl-0 = <&usart2_pins>;
pinctrl-names = "default";
status = "okay";
};
+
+&fmc {
+ pinctrl-0 = <&fmc_pins>;
+ pinctrl-names = "default";
+ status = "okay";
+
+ /*
+ * Memory configuration from sdram datasheet IS42S32800G-6BLI
+ * firsct bank is bank@0
+ * second bank is bank@1
+ */
+ bank1: bank@1 {
+ st,sdram-control = /bits/ 8 <NO_COL_9 NO_ROW_12 MWIDTH_32 BANKS_4
+ CAS_2 SDCLK_3 RD_BURST_EN RD_PIPE_DL_0>;
+ st,sdram-timing = /bits/ 8 <TMRD_1 TXSR_1 TRAS_1 TRC_6 TRP_2
+ TWR_1 TRCD_1>;
+ st,sdram-refcount = <1539>;
+ };
+};