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authorTom Rini <trini@konsulko.com>2020-07-29 16:30:45 -0400
committerTom Rini <trini@konsulko.com>2020-07-29 16:30:45 -0400
commit7cb2060b4e63a89c50739dc8a9fcd5d73f86f0be (patch)
tree984ba6e187e131d890354557925698ee614fdb7e /arch/arm/dts/stm32mp151.dtsi
parent8da75b1ddf966bd8457a2b5bf59dec0bfc9a1cd6 (diff)
parent0b263a905a02bd3ae7516149490a98462d966f55 (diff)
Merge https://gitlab.denx.de/u-boot/custodians/u-boot-stm
- fix SPL boot issue due to early dbgmcu_init() call - fix SPL boot issue due to dcache memory region configuration - add support of CONFIG_ENV_IS_IN_MMC - add specific SD/eMMC partition for U-Boot enviromnent - enable env in SPL - use "env info -q" to remove log during boot - remove env location override for dh_stm32mp1 - update management of misc_read - check result of find_mmc_device in stm32prog - use regulator_set_enable_if_allowed for disabling vdd supply in usbphyc - enable CMD_ADTIMG flag to handle Android images - device tree alignment with Linux Kernel v5.8-rc1 - remove hnp-srp-disable for usbotg on dk1 - add reset support to uart nodes on stm32mp15x - use correct weak function name spl_board_prepare_for_linux - use cd-gpios for ST and DHSOM boards - add seeed studio odyssey-stm32mp157c board support - move ethernet PHY into SoM DT - add DHSOM based DRC02 board support
Diffstat (limited to 'arch/arm/dts/stm32mp151.dtsi')
-rw-r--r--arch/arm/dts/stm32mp151.dtsi48
1 files changed, 27 insertions, 21 deletions
diff --git a/arch/arm/dts/stm32mp151.dtsi b/arch/arm/dts/stm32mp151.dtsi
index d5216a1831..0d97f56fca 100644
--- a/arch/arm/dts/stm32mp151.dtsi
+++ b/arch/arm/dts/stm32mp151.dtsi
@@ -44,8 +44,6 @@
psci {
compatible = "arm,psci-1.0";
method = "smc";
- cpu_off = <0x84000002>;
- cpu_on = <0x84000003>;
};
intc: interrupt-controller@a0021000 {
@@ -128,13 +126,6 @@
status = "disabled";
};
- reboot {
- compatible = "syscon-reboot";
- regmap = <&rcc>;
- offset = <0x404>;
- mask = <0x1>;
- };
-
soc {
compatible = "simple-bus";
#address-cells = <1>;
@@ -500,7 +491,7 @@
};
i2c1: i2c@40012000 {
- compatible = "st,stm32f7-i2c";
+ compatible = "st,stm32mp15-i2c";
reg = <0x40012000 0x400>;
interrupt-names = "event", "error";
interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>,
@@ -509,12 +500,13 @@
resets = <&rcc I2C1_R>;
#address-cells = <1>;
#size-cells = <0>;
+ st,syscfg-fmp = <&syscfg 0x4 0x1>;
wakeup-source;
status = "disabled";
};
i2c2: i2c@40013000 {
- compatible = "st,stm32f7-i2c";
+ compatible = "st,stm32mp15-i2c";
reg = <0x40013000 0x400>;
interrupt-names = "event", "error";
interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>,
@@ -523,12 +515,13 @@
resets = <&rcc I2C2_R>;
#address-cells = <1>;
#size-cells = <0>;
+ st,syscfg-fmp = <&syscfg 0x4 0x2>;
wakeup-source;
status = "disabled";
};
i2c3: i2c@40014000 {
- compatible = "st,stm32f7-i2c";
+ compatible = "st,stm32mp15-i2c";
reg = <0x40014000 0x400>;
interrupt-names = "event", "error";
interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
@@ -537,12 +530,13 @@
resets = <&rcc I2C3_R>;
#address-cells = <1>;
#size-cells = <0>;
+ st,syscfg-fmp = <&syscfg 0x4 0x4>;
wakeup-source;
status = "disabled";
};
i2c5: i2c@40015000 {
- compatible = "st,stm32f7-i2c";
+ compatible = "st,stm32mp15-i2c";
reg = <0x40015000 0x400>;
interrupt-names = "event", "error";
interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>,
@@ -551,6 +545,7 @@
resets = <&rcc I2C5_R>;
#address-cells = <1>;
#size-cells = <0>;
+ st,syscfg-fmp = <&syscfg 0x4 0x10>;
wakeup-source;
status = "disabled";
};
@@ -575,14 +570,14 @@
dac1: dac@1 {
compatible = "st,stm32-dac";
- #io-channels-cells = <1>;
+ #io-channel-cells = <1>;
reg = <1>;
status = "disabled";
};
dac2: dac@2 {
compatible = "st,stm32-dac";
- #io-channels-cells = <1>;
+ #io-channel-cells = <1>;
reg = <2>;
status = "disabled";
};
@@ -1157,6 +1152,11 @@
};
};
+ pwr_mcu: pwr_mcu@50001014 {
+ compatible = "syscon";
+ reg = <0x50001014 0x4>;
+ };
+
exti: interrupt-controller@5000d000 {
compatible = "st,stm32mp1-exti", "syscon";
interrupt-controller;
@@ -1413,14 +1413,12 @@
"mac-clk-tx",
"mac-clk-rx",
"eth-ck",
- "ethstp",
- "syscfg-clk";
+ "ethstp";
clocks = <&rcc ETHMAC>,
<&rcc ETHTX>,
<&rcc ETHRX>,
<&rcc ETHCK_K>,
- <&rcc ETHSTP>,
- <&rcc SYSCFG>;
+ <&rcc ETHSTP>;
st,syscon = <&syscfg 0x4>;
snps,mixed-burst;
snps,pbl = <2>;
@@ -1458,6 +1456,11 @@
clock-names = "lcd";
resets = <&rcc LTDC_R>;
status = "disabled";
+
+ port {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
};
iwdg2: watchdog@5a002000 {
@@ -1513,7 +1516,7 @@
};
i2c4: i2c@5c002000 {
- compatible = "st,stm32f7-i2c";
+ compatible = "st,stm32mp15-i2c";
reg = <0x5c002000 0x400>;
interrupt-names = "event", "error";
interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>,
@@ -1522,6 +1525,7 @@
resets = <&rcc I2C4_R>;
#address-cells = <1>;
#size-cells = <0>;
+ st,syscfg-fmp = <&syscfg 0x4 0x8>;
wakeup-source;
status = "disabled";
};
@@ -1552,7 +1556,7 @@
};
i2c6: i2c@5c009000 {
- compatible = "st,stm32f7-i2c";
+ compatible = "st,stm32mp15-i2c";
reg = <0x5c009000 0x400>;
interrupt-names = "event", "error";
interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>,
@@ -1561,6 +1565,7 @@
resets = <&rcc I2C6_R>;
#address-cells = <1>;
#size-cells = <0>;
+ st,syscfg-fmp = <&syscfg 0x4 0x20>;
wakeup-source;
status = "disabled";
};
@@ -1742,6 +1747,7 @@
resets = <&rcc MCU_R>;
st,syscfg-holdboot = <&rcc 0x10C 0x1>;
st,syscfg-tz = <&rcc 0x000 0x1>;
+ st,syscfg-pdds = <&pwr_mcu 0x0 0x1>;
status = "disabled";
};
};