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author | Tom Rini <trini@konsulko.com> | 2020-03-31 15:10:54 -0400 |
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committer | Tom Rini <trini@konsulko.com> | 2020-03-31 15:10:54 -0400 |
commit | 7dbafe06348ebf28044ef9769bf24866a3deedea (patch) | |
tree | 0bbd9cb387f5fa4bbb0c5f1476bde01bd03604c6 /arch/arm/dts/sun4i-a10-pcduino.dts | |
parent | 150db4264d210f6fd4fbf5e0e9cafc135eb13c17 (diff) | |
parent | 45bd649511155b5b5a40851ca96036636cb95e23 (diff) |
Merge tag 'arc-last-minute-fixes-for-2020.04' of https://gitlab.denx.de/u-boot/custodians/u-boot-arc
This last minute pull-request is intended to fix some drivers
when used on ARC boards. The problem was introduced by
https://gitlab.denx.de/u-boot/u-boot/-/commit/07906b3dad157bd58411664bcc6a2a7976d5e0a9
What happened while doing one pretty simple improvement to make
U-Boot port more flexible and portable (by switching accessors from
assembly-written to plain C version) we implicitly added 2 problems:
1. Downgraded accessors from being volatile which signalled to
the compiler that it's now possible to do all kinds of optimizations
which may easily include merge of subsequent byte reads/writes into
word operations. Which is OK for accessing mormal memory but
breaks operation of peripherals if we access its memory-mapped regs
in such a "creative" manner.
2. As a part of assembly-written implementation we had compiler barriers
in form of the following construction 'asm volatile("" : : : "memory")',
and we dropped it in C implemntation. This in its turn enabled compiler
to mess with instruction ordering. Guess what it gives us in the end :)
So with all that we had in some corner-cases veeery funny instruction flows
generated. And in particular it broke DW SPI functionality when we were
writing large amount of data. Funny enough our tests which were writing
small amount of data still worked and only by the chance we caught that
breakage and unrolled that quite interesting loop of unexpected
problems.
The road to hell is paved with good intentions. Amen :)
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