diff options
| author | Boris Brezillon <boris.brezillon@free-electrons.com> | 2016-06-15 21:09:28 +0200 |
|---|---|---|
| committer | Scott Wood <oss@buserror.net> | 2016-07-24 20:36:29 -0500 |
| commit | c1aa7d629eb9f0ed7836061170461abb04d34111 (patch) | |
| tree | a42678d8375fe4859e0d5779d2bdff3b5fa76ee3 /arch/arm/dts/sun5i-r8-chip.dts | |
| parent | a0dfa88b4e12c00414a4058823e0eec8c216f1d7 (diff) | |
sunxi: Enable NAND controller on the CHIP
Enable the NAND controller in the sun5i-r8-chip.dts.
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Diffstat (limited to 'arch/arm/dts/sun5i-r8-chip.dts')
| -rw-r--r-- | arch/arm/dts/sun5i-r8-chip.dts | 15 |
1 files changed, 15 insertions, 0 deletions
diff --git a/arch/arm/dts/sun5i-r8-chip.dts b/arch/arm/dts/sun5i-r8-chip.dts index 6ad19e272f..b1b62d5116 100644 --- a/arch/arm/dts/sun5i-r8-chip.dts +++ b/arch/arm/dts/sun5i-r8-chip.dts @@ -142,6 +142,21 @@ status = "okay"; }; +&nfc { + pinctrl-names = "default"; + pinctrl-0 = <&nand_pins_a &nand_cs0_pins_a &nand_rb0_pins_a>; + status = "okay"; + + nand@0 { + #address-cells = <2>; + #size-cells = <2>; + reg = <0>; + allwinner,rb = <0>; + nand-ecc-mode = "hw"; + nand-on-flash-bbt; + }; +}; + &ohci0 { status = "okay"; }; |