diff options
| author | Andre Przywara <andre.przywara@arm.com> | 2018-07-04 14:16:38 +0100 |
|---|---|---|
| committer | Jagan Teki <jagan@amarulasolutions.com> | 2018-07-16 12:03:16 +0530 |
| commit | 2d0c3d6b168854260aa2e80852d3d618aa3347e9 (patch) | |
| tree | 91f9f3682a05b4910f0b62337913412a657db164 /arch/arm/dts/sun8i-h3-orangepi-plus.dts | |
| parent | 1caeae375f075e9fa7c85807908e07b095e4ccdc (diff) | |
sunxi: DT: H3: update board .dts files from Linux
Update the .dts file for the various boards with an Allwinner H3 SoC.
This is as of v4.18-rc3, exactly Linux commit:
commit 721afaa2aeb860067decdddadc84ed16f42f2048 (HEAD)
Merge: 7c00e8ae041b 87815dda5593
Author: Linus Torvalds <torvalds@linux-foundation.org>
Date: Mon Jun 11 17:57:38 2018 -0700
Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
This also includes the OrangePi Zero .dts, which technically has an
Allwinner H2+ SoC.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Acked-by: Jagan Teki <jagan@amarulasolutions.com>
Diffstat (limited to 'arch/arm/dts/sun8i-h3-orangepi-plus.dts')
| -rw-r--r-- | arch/arm/dts/sun8i-h3-orangepi-plus.dts | 29 |
1 files changed, 12 insertions, 17 deletions
diff --git a/arch/arm/dts/sun8i-h3-orangepi-plus.dts b/arch/arm/dts/sun8i-h3-orangepi-plus.dts index 136e4414a4..b403e5d787 100644 --- a/arch/arm/dts/sun8i-h3-orangepi-plus.dts +++ b/arch/arm/dts/sun8i-h3-orangepi-plus.dts @@ -47,10 +47,12 @@ model = "Xunlong Orange Pi Plus / Plus 2"; compatible = "xunlong,orangepi-plus", "allwinner,sun8i-h3"; + aliases { + ethernet0 = &emac; + }; + reg_gmac_3v3: gmac-3v3 { compatible = "regulator-fixed"; - pinctrl-names = "default"; - pinctrl-0 = <&gmac_power_pin_orangepi>; regulator-name = "gmac-3v3"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; @@ -77,11 +79,13 @@ }; &emac { - /* The Orange Pi Plus uses an external phy */ pinctrl-names = "default"; pinctrl-0 = <&emac_rgmii_pins>; phy-supply = <®_gmac_3v3>; + phy-handle = <&ext_rgmii_phy>; phy-mode = "rgmii"; + + status = "okay"; }; &external_mdio { @@ -103,24 +107,15 @@ &mmc2_8bit_pins { /* Increase drive strength for DDR modes */ - allwinner,drive = <SUN4I_PINCTRL_40_MA>; + drive-strength = <40>; /* eMMC is missing pull-ups */ - allwinner,pull = <SUN4I_PINCTRL_PULL_UP>; + bias-pull-up; }; &pio { - gmac_power_pin_orangepi: gmac_power_pin@0 { - allwinner,pins = "PD6"; - allwinner,function = "gpio_out"; - allwinner,drive = <SUN4I_PINCTRL_10_MA>; - allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; - }; - - usb3_vbus_pin_a: usb3_vbus_pin@0 { - allwinner,pins = "PG11"; - allwinner,function = "gpio_out"; - allwinner,drive = <SUN4I_PINCTRL_10_MA>; - allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; + usb3_vbus_pin_a: usb3_vbus_pin { + pins = "PG11"; + function = "gpio_out"; }; }; |