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authorStephen Warren <swarren@nvidia.com>2016-08-30 10:22:07 -0600
committerTom Warren <twarren@nvidia.com>2016-08-30 11:14:53 -0700
commit7932d3e4a7d23c8b9b9ecd50f1869eaf3e46ed49 (patch)
tree195e9469a3cd95511f50f0c3a34b685bbb56030c /arch/arm/dts/tegra186-p2771-0000-000.dts
parentcb1cbdd96962931de2ac948a184874e2672f3f96 (diff)
ARM: tegra: use numeric versioning for p2771-0000
The board ID EEPROM and board ID stickers on p2771-0000 will use a numeric versioning scheme, with version numbers such as 000/100/200/300/400/500. Within NVIDIA, these versions are also known as A00/A01/A02/A03/A04/B00. However, that numbering scheme is not easily visible outside of NVIDIA, and so does not make much sense to use. Convert U-Boot to use the readily visible numeric scheme. Also, it turns out that the current A02 DT actually applies to board versions 000/100/200 (A00..A02). Consequently rename this to 000 not 200 so that all U-Boot builds are named after the first version of the HW they support. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
Diffstat (limited to 'arch/arm/dts/tegra186-p2771-0000-000.dts')
-rw-r--r--arch/arm/dts/tegra186-p2771-0000-000.dts32
1 files changed, 32 insertions, 0 deletions
diff --git a/arch/arm/dts/tegra186-p2771-0000-000.dts b/arch/arm/dts/tegra186-p2771-0000-000.dts
new file mode 100644
index 0000000000..d97c6fd3d0
--- /dev/null
+++ b/arch/arm/dts/tegra186-p2771-0000-000.dts
@@ -0,0 +1,32 @@
+/dts-v1/;
+
+#include "tegra186-p2771-0000.dtsi"
+
+/ {
+ model = "NVIDIA P2771-0000-000";
+ compatible = "nvidia,p2771-0000-000", "nvidia,p2771-0000", "nvidia,tegra186";
+
+ sdhci@3400000 {
+ cd-gpios = <&gpio_main TEGRA_MAIN_GPIO(P, 6) GPIO_ACTIVE_LOW>;
+ power-gpios = <&gpio_main TEGRA_MAIN_GPIO(P, 5) GPIO_ACTIVE_HIGH>;
+ };
+
+ pcie-controller@10003000 {
+ status = "okay";
+
+ pci@1,0 {
+ status = "okay";
+ nvidia,num-lanes = <2>;
+ };
+
+ pci@2,0 {
+ status = "disabled";
+ nvidia,num-lanes = <1>;
+ };
+
+ pci@3,0 {
+ status = "okay";
+ nvidia,num-lanes = <1>;
+ };
+ };
+};