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authorPatrice Chotard <patrice.chotard@st.com>2019-03-29 15:42:20 +0100
committerMarek Vasut <marex@denx.de>2019-04-21 10:26:52 +0200
commit763bb106f66c147b7d0c3046dbba66a07d7a9dd2 (patch)
tree88d8ab8ac95746c9fa6d772e1c83298b7e5fde47 /arch/arm/dts/tegra20-u-boot.dtsi
parent5bd97e80730bdda59656ca927d67d62fb2a4ecb6 (diff)
usb: dwc2_udc_otg: Add tx_fifo_sz array support
All TX fifo size can be different, add tx_fifo_sz_array[] into dwc2_plat_otg_data to be able to set them. tx_fifo_sz_array[] is 17 Bytes long and can contains max 16 tx fifo size (synopsys IP supports max 16 IN endpoints). First entry of tx_fifo_sz_array[] is the number of valid fifo size the array contains. In case of tx_fifo_sz_array[] doesn't contains the same number of element than max hardware endpoint, display a warning message. Compatibility with board which doesn't use tx_fifo_sz_array[] (Rockchip rk322x/rk3128/rv1108/rk3288/rk3036) is kept. Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
Diffstat (limited to 'arch/arm/dts/tegra20-u-boot.dtsi')
0 files changed, 0 insertions, 0 deletions