diff options
author | Masahiro Yamada <yamada.masahiro@socionext.com> | 2016-10-07 16:43:00 +0900 |
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committer | Masahiro Yamada <yamada.masahiro@socionext.com> | 2016-10-18 14:06:46 +0900 |
commit | 52159d27ffe6b2a1a7e874cb2fda5aadbd4f03e5 (patch) | |
tree | f38ada5a58e3747ddcc5abbf9358192138fea3fa /arch/arm/dts/uniphier-ph1-pro4.dtsi | |
parent | 805dc44cc8afc357f7cdca8b183d0b641768bdb2 (diff) |
ARM: dts: uniphier: sync DT with latest Linux
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Diffstat (limited to 'arch/arm/dts/uniphier-ph1-pro4.dtsi')
-rw-r--r-- | arch/arm/dts/uniphier-ph1-pro4.dtsi | 473 |
1 files changed, 0 insertions, 473 deletions
diff --git a/arch/arm/dts/uniphier-ph1-pro4.dtsi b/arch/arm/dts/uniphier-ph1-pro4.dtsi deleted file mode 100644 index 192ce841e1..0000000000 --- a/arch/arm/dts/uniphier-ph1-pro4.dtsi +++ /dev/null @@ -1,473 +0,0 @@ -/* - * Device Tree Source for UniPhier PH1-Pro4 SoC - * - * Copyright (C) 2014-2015 Masahiro Yamada <yamada.masahiro@socionext.com> - * - * SPDX-License-Identifier: GPL-2.0+ X11 - */ - -/include/ "uniphier-common32.dtsi" - -/ { - compatible = "socionext,ph1-pro4"; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - enable-method = "socionext,uniphier-smp"; - - cpu@0 { - device_type = "cpu"; - compatible = "arm,cortex-a9"; - reg = <0>; - next-level-cache = <&l2>; - }; - - cpu@1 { - device_type = "cpu"; - compatible = "arm,cortex-a9"; - reg = <1>; - next-level-cache = <&l2>; - }; - }; - - clocks { - arm_timer_clk: arm_timer_clk { - #clock-cells = <0>; - compatible = "fixed-clock"; - clock-frequency = <50000000>; - }; - - uart_clk: uart_clk { - #clock-cells = <0>; - compatible = "fixed-clock"; - clock-frequency = <73728000>; - }; - - i2c_clk: i2c_clk { - #clock-cells = <0>; - compatible = "fixed-clock"; - clock-frequency = <50000000>; - }; - }; -}; - -&soc { - l2: l2-cache@500c0000 { - compatible = "socionext,uniphier-system-cache"; - reg = <0x500c0000 0x2000>, <0x503c0100 0x4>, <0x506c0000 0x400>; - interrupts = <0 174 4>, <0 175 4>; - cache-unified; - cache-size = <(768 * 1024)>; - cache-sets = <256>; - cache-line-size = <128>; - cache-level = <2>; - }; - - port0x: gpio@55000008 { - compatible = "socionext,uniphier-gpio"; - reg = <0x55000008 0x8>; - gpio-controller; - #gpio-cells = <2>; - }; - - port1x: gpio@55000010 { - compatible = "socionext,uniphier-gpio"; - reg = <0x55000010 0x8>; - gpio-controller; - #gpio-cells = <2>; - }; - - port2x: gpio@55000018 { - compatible = "socionext,uniphier-gpio"; - reg = <0x55000018 0x8>; - gpio-controller; - #gpio-cells = <2>; - }; - - port3x: gpio@55000020 { - compatible = "socionext,uniphier-gpio"; - reg = <0x55000020 0x8>; - gpio-controller; - #gpio-cells = <2>; - }; - - port4: gpio@55000028 { - compatible = "socionext,uniphier-gpio"; - reg = <0x55000028 0x8>; - gpio-controller; - #gpio-cells = <2>; - }; - - port5x: gpio@55000030 { - compatible = "socionext,uniphier-gpio"; - reg = <0x55000030 0x8>; - gpio-controller; - #gpio-cells = <2>; - }; - - port6x: gpio@55000038 { - compatible = "socionext,uniphier-gpio"; - reg = <0x55000038 0x8>; - gpio-controller; - #gpio-cells = <2>; - }; - - port7x: gpio@55000040 { - compatible = "socionext,uniphier-gpio"; - reg = <0x55000040 0x8>; - gpio-controller; - #gpio-cells = <2>; - }; - - port8x: gpio@55000048 { - compatible = "socionext,uniphier-gpio"; - reg = <0x55000048 0x8>; - gpio-controller; - #gpio-cells = <2>; - }; - - port9x: gpio@55000050 { - compatible = "socionext,uniphier-gpio"; - reg = <0x55000050 0x8>; - gpio-controller; - #gpio-cells = <2>; - }; - - port10x: gpio@55000058 { - compatible = "socionext,uniphier-gpio"; - reg = <0x55000058 0x8>; - gpio-controller; - #gpio-cells = <2>; - }; - - port11x: gpio@55000060 { - compatible = "socionext,uniphier-gpio"; - reg = <0x55000060 0x8>; - gpio-controller; - #gpio-cells = <2>; - }; - - port12x: gpio@55000068 { - compatible = "socionext,uniphier-gpio"; - reg = <0x55000068 0x8>; - gpio-controller; - #gpio-cells = <2>; - }; - - port13x: gpio@55000070 { - compatible = "socionext,uniphier-gpio"; - reg = <0x55000070 0x8>; - gpio-controller; - #gpio-cells = <2>; - }; - - port14x: gpio@55000078 { - compatible = "socionext,uniphier-gpio"; - reg = <0x55000078 0x8>; - gpio-controller; - #gpio-cells = <2>; - }; - - port17x: gpio@550000a0 { - compatible = "socionext,uniphier-gpio"; - reg = <0x550000a0 0x8>; - gpio-controller; - #gpio-cells = <2>; - }; - - port18x: gpio@550000a8 { - compatible = "socionext,uniphier-gpio"; - reg = <0x550000a8 0x8>; - gpio-controller; - #gpio-cells = <2>; - }; - - port19x: gpio@550000b0 { - compatible = "socionext,uniphier-gpio"; - reg = <0x550000b0 0x8>; - gpio-controller; - #gpio-cells = <2>; - }; - - port20x: gpio@550000b8 { - compatible = "socionext,uniphier-gpio"; - reg = <0x550000b8 0x8>; - gpio-controller; - #gpio-cells = <2>; - }; - - port21x: gpio@550000c0 { - compatible = "socionext,uniphier-gpio"; - reg = <0x550000c0 0x8>; - gpio-controller; - #gpio-cells = <2>; - }; - - port22x: gpio@550000c8 { - compatible = "socionext,uniphier-gpio"; - reg = <0x550000c8 0x8>; - gpio-controller; - #gpio-cells = <2>; - }; - - port23x: gpio@550000d0 { - compatible = "socionext,uniphier-gpio"; - reg = <0x550000d0 0x8>; - gpio-controller; - #gpio-cells = <2>; - }; - - port24x: gpio@550000d8 { - compatible = "socionext,uniphier-gpio"; - reg = <0x550000d8 0x8>; - gpio-controller; - #gpio-cells = <2>; - }; - - port25x: gpio@550000e0 { - compatible = "socionext,uniphier-gpio"; - reg = <0x550000e0 0x8>; - gpio-controller; - #gpio-cells = <2>; - }; - - port26x: gpio@550000e8 { - compatible = "socionext,uniphier-gpio"; - reg = <0x550000e8 0x8>; - gpio-controller; - #gpio-cells = <2>; - }; - - port27x: gpio@550000f0 { - compatible = "socionext,uniphier-gpio"; - reg = <0x550000f0 0x8>; - gpio-controller; - #gpio-cells = <2>; - }; - - port28x: gpio@550000f8 { - compatible = "socionext,uniphier-gpio"; - reg = <0x550000f8 0x8>; - gpio-controller; - #gpio-cells = <2>; - }; - - port29x: gpio@55000100 { - compatible = "socionext,uniphier-gpio"; - reg = <0x55000100 0x8>; - gpio-controller; - #gpio-cells = <2>; - }; - - port30x: gpio@55000108 { - compatible = "socionext,uniphier-gpio"; - reg = <0x55000108 0x8>; - gpio-controller; - #gpio-cells = <2>; - }; - - i2c0: i2c@58780000 { - compatible = "socionext,uniphier-fi2c"; - status = "disabled"; - reg = <0x58780000 0x80>; - #address-cells = <1>; - #size-cells = <0>; - interrupts = <0 41 4>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_i2c0>; - clocks = <&i2c_clk>; - clock-frequency = <100000>; - }; - - i2c1: i2c@58781000 { - compatible = "socionext,uniphier-fi2c"; - status = "disabled"; - reg = <0x58781000 0x80>; - #address-cells = <1>; - #size-cells = <0>; - interrupts = <0 42 4>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_i2c1>; - clocks = <&i2c_clk>; - clock-frequency = <100000>; - }; - - i2c2: i2c@58782000 { - compatible = "socionext,uniphier-fi2c"; - status = "disabled"; - reg = <0x58782000 0x80>; - #address-cells = <1>; - #size-cells = <0>; - interrupts = <0 43 4>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_i2c2>; - clocks = <&i2c_clk>; - clock-frequency = <100000>; - }; - - i2c3: i2c@58783000 { - compatible = "socionext,uniphier-fi2c"; - status = "disabled"; - reg = <0x58783000 0x80>; - #address-cells = <1>; - #size-cells = <0>; - interrupts = <0 44 4>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_i2c3>; - clocks = <&i2c_clk>; - clock-frequency = <100000>; - }; - - /* i2c4 does not exist */ - - /* chip-internal connection for DMD */ - i2c5: i2c@58785000 { - compatible = "socionext,uniphier-fi2c"; - reg = <0x58785000 0x80>; - #address-cells = <1>; - #size-cells = <0>; - interrupts = <0 25 4>; - clocks = <&i2c_clk>; - clock-frequency = <400000>; - }; - - /* chip-internal connection for HDMI */ - i2c6: i2c@58786000 { - compatible = "socionext,uniphier-fi2c"; - reg = <0x58786000 0x80>; - #address-cells = <1>; - #size-cells = <0>; - interrupts = <0 26 4>; - clocks = <&i2c_clk>; - clock-frequency = <400000>; - }; - - sd: sdhc@5a400000 { - compatible = "socionext,uniphier-sdhc"; - status = "disabled"; - reg = <0x5a400000 0x200>; - interrupts = <0 76 4>; - pinctrl-names = "default", "1.8v"; - pinctrl-0 = <&pinctrl_sd>; - pinctrl-1 = <&pinctrl_sd_1v8>; - clocks = <&mio_clk 0>; - bus-width = <4>; - }; - - emmc: sdhc@5a500000 { - compatible = "socionext,uniphier-sdhc"; - status = "disabled"; - reg = <0x5a500000 0x200>; - interrupts = <0 78 4>; - pinctrl-names = "default", "1.8v"; - pinctrl-0 = <&pinctrl_emmc>; - pinctrl-1 = <&pinctrl_emmc_1v8>; - clocks = <&mio_clk 1>; - bus-width = <8>; - non-removable; - }; - - sd1: sdhc@5a600000 { - compatible = "socionext,uniphier-sdhc"; - status = "disabled"; - reg = <0x5a600000 0x200>; - interrupts = <0 85 4>; - pinctrl-names = "default", "1.8v"; - pinctrl-0 = <&pinctrl_sd1>; - pinctrl-1 = <&pinctrl_sd1_1v8>; - clocks = <&mio_clk 2>; - bus-width = <4>; - }; - - usb2: usb@5a800100 { - compatible = "socionext,uniphier-ehci", "generic-ehci"; - status = "disabled"; - reg = <0x5a800100 0x100>; - interrupts = <0 80 4>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_usb2>; - clocks = <&mio_clk 3>, <&mio_clk 6>; - }; - - usb3: usb@5a810100 { - compatible = "socionext,uniphier-ehci", "generic-ehci"; - status = "disabled"; - reg = <0x5a810100 0x100>; - interrupts = <0 81 4>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_usb3>; - clocks = <&mio_clk 4>, <&mio_clk 6>; - }; - - aidet@5fc20000 { - compatible = "simple-mfd", "syscon"; - reg = <0x5fc20000 0x200>; - }; - - usb0: usb@65a00000 { - compatible = "socionext,uniphier-xhci", "generic-xhci"; - status = "disabled"; - reg = <0x65a00000 0x100>; - interrupts = <0 134 4>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_usb0>; - }; - - usb1: usb@65c00000 { - compatible = "socionext,uniphier-xhci", "generic-xhci"; - status = "disabled"; - reg = <0x65c00000 0x100>; - interrupts = <0 137 4>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_usb1>; - }; -}; - -&refclk { - clock-frequency = <25000000>; -}; - -&serial0 { - clock-frequency = <73728000>; -}; - -&serial1 { - clock-frequency = <73728000>; -}; - -&serial2 { - clock-frequency = <73728000>; -}; - -&serial3 { - clock-frequency = <73728000>; -}; - -&mio_clk { - compatible = "socionext,uniphier-pro4-mio-clock"; -}; - -&mio_rst { - compatible = "socionext,uniphier-pro4-mio-reset"; -}; - -&peri_clk { - compatible = "socionext,uniphier-pro4-peri-clock"; -}; - -&peri_rst { - compatible = "socionext,uniphier-pro4-peri-reset"; -}; - -&pinctrl { - compatible = "socionext,uniphier-pro4-pinctrl"; -}; - -&sys_clk { - compatible = "socionext,uniphier-pro4-clock"; -}; - -&sys_rst { - compatible = "socionext,uniphier-pro4-reset"; -}; |