diff options
author | Masahiro Yamada <yamada.masahiro@socionext.com> | 2015-12-16 10:54:07 +0900 |
---|---|---|
committer | Masahiro Yamada <yamada.masahiro@socionext.com> | 2015-12-23 00:08:33 +0900 |
commit | 8f06243aa0448d1d182cbc768845f3a642ce6731 (patch) | |
tree | d55bf6e9a7e70e33e59772894831900d7b54d9a6 /arch/arm/dts/uniphier-ph1-pro5.dtsi | |
parent | 6a9f6ba0f9aec784d748d9c30dcee5cd4c2eadd5 (diff) |
ARM: dts: uniphier: factor out common nodes to uniphier-common32.dtsi
UniPhier SoCs (except PH1-sLD3) have several nodes in common.
Factor out them into uniphier-common32.dtsi. This improves the code
maintainability.
PH1-sLD3 is so old that it has more or less different register maps
than the others. So, it cannot be included in this refactoring.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Diffstat (limited to 'arch/arm/dts/uniphier-ph1-pro5.dtsi')
-rw-r--r-- | arch/arm/dts/uniphier-ph1-pro5.dtsi | 271 |
1 files changed, 102 insertions, 169 deletions
diff --git a/arch/arm/dts/uniphier-ph1-pro5.dtsi b/arch/arm/dts/uniphier-ph1-pro5.dtsi index 6f19bf81dc..876242f81b 100644 --- a/arch/arm/dts/uniphier-ph1-pro5.dtsi +++ b/arch/arm/dts/uniphier-ph1-pro5.dtsi @@ -6,7 +6,7 @@ * SPDX-License-Identifier: GPL-2.0+ X11 */ -/include/ "skeleton.dtsi" +/include/ "uniphier-common32.dtsi" / { compatible = "socionext,ph1-pro5"; @@ -48,187 +48,120 @@ clock-frequency = <50000000>; }; }; +}; - soc { - compatible = "simple-bus"; +&soc { + i2c0: i2c@58780000 { + compatible = "socionext,uniphier-fi2c"; + status = "disabled"; + reg = <0x58780000 0x80>; #address-cells = <1>; - #size-cells = <1>; - ranges; - interrupt-parent = <&intc>; - - extbus: extbus { - compatible = "simple-bus"; - #address-cells = <2>; - #size-cells = <1>; - }; - - serial0: serial@54006800 { - compatible = "socionext,uniphier-uart"; - status = "disabled"; - reg = <0x54006800 0x40>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_uart0>; - interrupts = <0 33 4>; - clocks = <&uart_clk>; - }; - - serial1: serial@54006900 { - compatible = "socionext,uniphier-uart"; - status = "disabled"; - reg = <0x54006900 0x40>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_uart1>; - interrupts = <0 35 4>; - clocks = <&uart_clk>; - }; - - serial2: serial@54006a00 { - compatible = "socionext,uniphier-uart"; - status = "disabled"; - reg = <0x54006a00 0x40>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_uart2>; - interrupts = <0 37 4>; - clocks = <&uart_clk>; - }; - - serial3: serial@54006b00 { - compatible = "socionext,uniphier-uart"; - status = "disabled"; - reg = <0x54006b00 0x40>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_uart3>; - interrupts = <0 177 4>; - clocks = <&uart_clk>; - }; - - i2c0: i2c@58780000 { - compatible = "socionext,uniphier-fi2c"; - status = "disabled"; - reg = <0x58780000 0x80>; - #address-cells = <1>; - #size-cells = <0>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_i2c0>; - interrupts = <0 41 4>; - clocks = <&i2c_clk>; - clock-frequency = <100000>; - }; + #size-cells = <0>; + interrupts = <0 41 4>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c0>; + clocks = <&i2c_clk>; + clock-frequency = <100000>; + }; - i2c1: i2c@58781000 { - compatible = "socionext,uniphier-fi2c"; - status = "disabled"; - reg = <0x58781000 0x80>; - #address-cells = <1>; - #size-cells = <0>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_i2c1>; - interrupts = <0 42 4>; - clocks = <&i2c_clk>; - clock-frequency = <100000>; - }; + i2c1: i2c@58781000 { + compatible = "socionext,uniphier-fi2c"; + status = "disabled"; + reg = <0x58781000 0x80>; + #address-cells = <1>; + #size-cells = <0>; + interrupts = <0 42 4>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c1>; + clocks = <&i2c_clk>; + clock-frequency = <100000>; + }; - i2c2: i2c@58782000 { - compatible = "socionext,uniphier-fi2c"; - status = "disabled"; - reg = <0x58782000 0x80>; - #address-cells = <1>; - #size-cells = <0>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_i2c2>; - interrupts = <0 43 4>; - clocks = <&i2c_clk>; - clock-frequency = <100000>; - }; + i2c2: i2c@58782000 { + compatible = "socionext,uniphier-fi2c"; + status = "disabled"; + reg = <0x58782000 0x80>; + #address-cells = <1>; + #size-cells = <0>; + interrupts = <0 43 4>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c2>; + clocks = <&i2c_clk>; + clock-frequency = <100000>; + }; - i2c3: i2c@58783000 { - compatible = "socionext,uniphier-fi2c"; - status = "disabled"; - reg = <0x58783000 0x80>; - #address-cells = <1>; - #size-cells = <0>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_i2c3>; - interrupts = <0 44 4>; - clocks = <&i2c_clk>; - clock-frequency = <100000>; - }; + i2c3: i2c@58783000 { + compatible = "socionext,uniphier-fi2c"; + status = "disabled"; + reg = <0x58783000 0x80>; + #address-cells = <1>; + #size-cells = <0>; + interrupts = <0 44 4>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c3>; + clocks = <&i2c_clk>; + clock-frequency = <100000>; + }; - /* i2c4 does not exist */ - - /* chip-internal connection for DMD */ - i2c5: i2c@58785000 { - compatible = "socionext,uniphier-fi2c"; - reg = <0x58785000 0x80>; - #address-cells = <1>; - #size-cells = <0>; - interrupts = <0 25 4>; - clocks = <&i2c_clk>; - clock-frequency = <400000>; - }; + /* i2c4 does not exist */ - /* chip-internal connection for HDMI */ - i2c6: i2c@58786000 { - compatible = "socionext,uniphier-fi2c"; - reg = <0x58786000 0x80>; - #address-cells = <1>; - #size-cells = <0>; - interrupts = <0 26 4>; - clocks = <&i2c_clk>; - clock-frequency = <400000>; - }; + /* chip-internal connection for DMD */ + i2c5: i2c@58785000 { + compatible = "socionext,uniphier-fi2c"; + reg = <0x58785000 0x80>; + #address-cells = <1>; + #size-cells = <0>; + interrupts = <0 25 4>; + clocks = <&i2c_clk>; + clock-frequency = <400000>; + }; - system-bus-controller-misc@59800000 { - compatible = "socionext,uniphier-system-bus-controller-misc", - "syscon"; - reg = <0x59800000 0x2000>; - }; + /* chip-internal connection for HDMI */ + i2c6: i2c@58786000 { + compatible = "socionext,uniphier-fi2c"; + reg = <0x58786000 0x80>; + #address-cells = <1>; + #size-cells = <0>; + interrupts = <0 26 4>; + clocks = <&i2c_clk>; + clock-frequency = <400000>; + }; - pinctrl: pinctrl@5f801000 { - compatible = "socionext,ph1-pro5-pinctrl", "syscon"; - reg = <0x5f801000 0xe00>; - }; + usb0: usb@65a00000 { + compatible = "socionext,uniphier-xhci", "generic-xhci"; + status = "disabled"; + reg = <0x65a00000 0x100>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usb0>; + interrupts = <0 134 4>; + }; - timer@60000200 { - compatible = "arm,cortex-a9-global-timer"; - reg = <0x60000200 0x20>; - interrupts = <1 11 0x304>; - clocks = <&arm_timer_clk>; - }; + usb1: usb@65c00000 { + compatible = "socionext,uniphier-xhci", "generic-xhci"; + status = "disabled"; + reg = <0x65c00000 0x100>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usb1>, <&pinctrl_usb2>; + interrupts = <0 137 4>; + }; +}; - timer@60000600 { - compatible = "arm,cortex-a9-twd-timer"; - reg = <0x60000600 0x20>; - interrupts = <1 13 0x304>; - clocks = <&arm_timer_clk>; - }; +&serial0 { + clock-frequency = <73728000>; +}; - intc: interrupt-controller@60001000 { - compatible = "arm,cortex-a9-gic"; - #interrupt-cells = <3>; - interrupt-controller; - reg = <0x60001000 0x1000>, - <0x60000100 0x100>; - }; +&serial1 { + clock-frequency = <73728000>; +}; - usb0: usb@65a00000 { - compatible = "socionext,uniphier-xhci", "generic-xhci"; - status = "disabled"; - reg = <0x65a00000 0x100>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_usb0>; - interrupts = <0 134 4>; - }; +&serial2 { + clock-frequency = <73728000>; +}; - usb1: usb@65c00000 { - compatible = "socionext,uniphier-xhci", "generic-xhci"; - status = "disabled"; - reg = <0x65c00000 0x100>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_usb1>, <&pinctrl_usb2>; - interrupts = <0 137 4>; - }; - }; +&serial3 { + clock-frequency = <73728000>; }; -/include/ "uniphier-pinctrl.dtsi" +&pinctrl { + compatible = "socionext,ph1-pro5-pinctrl", "syscon"; +}; |