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authorMasahiro Yamada <yamada.masahiro@socionext.com>2015-03-11 15:54:46 +0900
committerMasahiro Yamada <yamada.masahiro@socionext.com>2015-03-15 13:37:00 +0900
commit6462cdedc20b08ff5aa402a991ec89b3255ba51d (patch)
tree43a17bb1442a2daa1d3a3fe5667aee5879183feb /arch/arm/dts/uniphier-ph1-sld8.dtsi
parent79cee3cf5e541107ff8ae24ae7959175a1ac656b (diff)
ARM: UniPhier: adjust device trees for business transfer
Panasonic's System LSI products, UniPhier SoC family, have been transferred to Socionext Inc. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Diffstat (limited to 'arch/arm/dts/uniphier-ph1-sld8.dtsi')
-rw-r--r--arch/arm/dts/uniphier-ph1-sld8.dtsi27
1 files changed, 14 insertions, 13 deletions
diff --git a/arch/arm/dts/uniphier-ph1-sld8.dtsi b/arch/arm/dts/uniphier-ph1-sld8.dtsi
index 1b3eb228c8..d9f61c2231 100644
--- a/arch/arm/dts/uniphier-ph1-sld8.dtsi
+++ b/arch/arm/dts/uniphier-ph1-sld8.dtsi
@@ -2,7 +2,8 @@
* Device Tree Source for UniPhier PH1-sLD8 SoC
*
* Copyright (C) 2014-2015 Panasonic Corporation
- * Author: Masahiro Yamada <yamada.m@jp.panasonic.com>
+ * Copyright (C) 2015 Socionext Inc.
+ * Author: Masahiro Yamada <yamada.masahiro@socionext.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
@@ -10,7 +11,7 @@
/include/ "skeleton.dtsi"
/ {
- compatible = "panasonic,ph1-sld8";
+ compatible = "socionext,ph1-sld8";
cpus {
#address-cells = <1>;
@@ -30,35 +31,35 @@
ranges;
uart0: serial@54006800 {
- compatible = "panasonic,uniphier-uart";
+ compatible = "socionext,uniphier-uart";
status = "disabled";
reg = <0x54006800 0x20>;
clock-frequency = <80000000>;
};
uart1: serial@54006900 {
- compatible = "panasonic,uniphier-uart";
+ compatible = "socionext,uniphier-uart";
status = "disabled";
reg = <0x54006900 0x20>;
clock-frequency = <80000000>;
};
uart2: serial@54006a00 {
- compatible = "panasonic,uniphier-uart";
+ compatible = "socionext,uniphier-uart";
status = "disabled";
reg = <0x54006a00 0x20>;
clock-frequency = <80000000>;
};
uart3: serial@54006b00 {
- compatible = "panasonic,uniphier-uart";
+ compatible = "socionext,uniphier-uart";
status = "disabled";
reg = <0x54006b00 0x20>;
clock-frequency = <80000000>;
};
i2c0: i2c@58400000 {
- compatible = "panasonic,uniphier-i2c";
+ compatible = "socionext,uniphier-i2c";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x58400000 0x40>;
@@ -67,7 +68,7 @@
};
i2c1: i2c@58480000 {
- compatible = "panasonic,uniphier-i2c";
+ compatible = "socionext,uniphier-i2c";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x58480000 0x40>;
@@ -76,7 +77,7 @@
};
i2c2: i2c@58500000 {
- compatible = "panasonic,uniphier-i2c";
+ compatible = "socionext,uniphier-i2c";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x58500000 0x40>;
@@ -85,7 +86,7 @@
};
i2c3: i2c@58580000 {
- compatible = "panasonic,uniphier-i2c";
+ compatible = "socionext,uniphier-i2c";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x58580000 0x40>;
@@ -94,19 +95,19 @@
};
usb0: usb@5a800100 {
- compatible = "panasonic,uniphier-ehci", "generic-ehci";
+ compatible = "socionext,uniphier-ehci", "generic-ehci";
status = "disabled";
reg = <0x5a800100 0x100>;
};
usb1: usb@5a810100 {
- compatible = "panasonic,uniphier-ehci", "generic-ehci";
+ compatible = "socionext,uniphier-ehci", "generic-ehci";
status = "disabled";
reg = <0x5a810100 0x100>;
};
usb2: usb@5a820100 {
- compatible = "panasonic,uniphier-ehci", "generic-ehci";
+ compatible = "socionext,uniphier-ehci", "generic-ehci";
status = "disabled";
reg = <0x5a820100 0x100>;
};