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authorMichal Simek <michal.simek@xilinx.com>2018-11-29 10:37:49 +0100
committerMichal Simek <michal.simek@xilinx.com>2018-11-30 10:45:26 +0100
commitee97a9996a4e18d52f57095232eb12134a722272 (patch)
treed64b72202d7e28c68bbbd3f9fca50dde10886c8c /arch/arm/dts/zynqmp-mini.dts
parent8cf1a6e83b084425d8da9a3eb22d5d064989b81f (diff)
arm64: zynqmp: Add mini mtest configuration
This configuration is useful when you want to run small u-boot and perform DDR memory test to make sure that DDR is properly configured. It is use for board bringup because alternative u-boot memory tests is quite good. Configuration is running out of OCM. As is done for others mini configurations 0x80 bytes for variables is enough and only default variables are stored there. Alternative memtest is enabled and also 2GB of DDR via DTS files. Configuration is enabling ZYNQMP_PSU_INIT_ENABLED and include psu_init() from zcu102 for testing purpose. In case of size issue this can be moved to SPL configuration as is done for mini_qspi configuration but it is not a problem now. Log: U-Boot 2018.11-00268-gbd58b8ba8915 (Nov 29 2018 - 15:33:35 +0100) Model: ZynqMP MINI Board: Xilinx ZynqMP DRAM: WARNING: Initializing TCM overwrites TCM content 2 GiB EL Level: EL3 In: dcc Out: dcc Err: dcc ZynqMP> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Diffstat (limited to 'arch/arm/dts/zynqmp-mini.dts')
-rw-r--r--arch/arm/dts/zynqmp-mini.dts40
1 files changed, 40 insertions, 0 deletions
diff --git a/arch/arm/dts/zynqmp-mini.dts b/arch/arm/dts/zynqmp-mini.dts
new file mode 100644
index 0000000000..1faee9ec75
--- /dev/null
+++ b/arch/arm/dts/zynqmp-mini.dts
@@ -0,0 +1,40 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * dts file for Xilinx ZynqMP Mini Configuration
+ *
+ * (C) Copyright 2017, Xilinx, Inc.
+ *
+ * Michal Simek <michal.simek@xilinx.com>
+ */
+
+/dts-v1/;
+
+/ {
+ model = "ZynqMP MINI";
+ compatible = "xlnx,zynqmp";
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ aliases {
+ serial0 = &dcc;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ memory@0 {
+ device_type = "memory";
+ reg = <0x0 0xfffc0000 0x0 0x40000>, <0x0 0x0 0x0 0x80000000>;
+ };
+
+ dcc: dcc {
+ compatible = "arm,dcc";
+ status = "disabled";
+ u-boot,dm-pre-reloc;
+ };
+};
+
+&dcc {
+ status = "okay";
+};