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authorLuis Araneda <luaraneda@gmail.com>2018-07-19 03:10:16 -0400
committerMichal Simek <michal.simek@xilinx.com>2018-07-19 10:49:56 +0200
commit3907eef1a385e52d99d9888de078cd652548a668 (patch)
treef3e3f86320fd86aec650a419ea6d0bd733d0193a /arch/arm/dts/zynqmp-zc1254-revA.dts
parenta133b3ac3257e471f521991e472c8f8c15d2c5a9 (diff)
spl: fit: display a message when an FPGA image is loaded
A message should be displayed if an image is loaded to an FPGA, because the hardware might have changed, and the user should be informed Signed-off-by: Luis Araneda <luaraneda@gmail.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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