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| author | Tom Rini <trini@konsulko.com> | 2018-12-03 19:30:54 -0500 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2018-12-03 19:30:54 -0500 |
| commit | 0a3d59e01038a3a50484b8bfcf834376a7215af0 (patch) | |
| tree | fc58f6aa543d4f920d1b4b36dc52c534d6dc1afc /arch/arm/dts/zynqmp-zcu102-revA.dts | |
| parent | 9981c60ef583f3608eff8ab4837198f72240ea17 (diff) | |
| parent | 5f68f44c14ab93ffc44a9285e0970cba467276c6 (diff) | |
Merge tag 'xilinx-for-v2019.01' of git://git.denx.de/u-boot-microblaze
Xilinx changes for v2019.01
microblaze:
- Use default functions for memory decoding
- Showing model from DT
zynq:
- Fix spi flash DTs
- Fix zynq_help_text with CONFIG_SYS_LONGHELP
- Tune cse/mini configurations
- Enabling cse/mini testing with current targets
zynqmp:
- Enable gzip SPL support
- Fix chip detection logic
- Tune mini configurations
- DT fixes(spi-flash, models, clocks, etc)
- Add support for OF_SEPARATE configurations
- Enabling mini testing with current targets
- Add mini mtest configuration
- Some minor config setting
nand:
- arasan: Add subpage configuration
net:
- gem: Add 64bit DMA support
Diffstat (limited to 'arch/arm/dts/zynqmp-zcu102-revA.dts')
| -rw-r--r-- | arch/arm/dts/zynqmp-zcu102-revA.dts | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm/dts/zynqmp-zcu102-revA.dts b/arch/arm/dts/zynqmp-zcu102-revA.dts index ac7035fde7..05be919f6f 100644 --- a/arch/arm/dts/zynqmp-zcu102-revA.dts +++ b/arch/arm/dts/zynqmp-zcu102-revA.dts @@ -422,6 +422,7 @@ temperature-stability = <50>; factory-fout = <300000000>; clock-frequency = <300000000>; + clock-output-names = "si570_user"; }; }; i2c@3 { @@ -435,6 +436,7 @@ temperature-stability = <50>; /* copy from zc702 */ factory-fout = <156250000>; clock-frequency = <148500000>; + clock-output-names = "si570_mgt"; }; }; i2c@4 { |