diff options
| author | Manish Narani <manish.narani@xilinx.com> | 2017-07-19 21:16:33 +0530 |
|---|---|---|
| committer | Michal Simek <michal.simek@xilinx.com> | 2017-11-28 16:09:15 +0100 |
| commit | 5e3c90d238d742c101e0b0e904b2e070f32f3f48 (patch) | |
| tree | 831d118f737a1de2ca14a5f4213e7b5dfdec03c5 /arch/arm/dts/zynqmp.dtsi | |
| parent | 0aada397b5290e98a735506eabceb80a98b6fd06 (diff) | |
arm64: zynqmp: sdhci: set host quirk2 for no 1.8V support for 1.0 silicon
This patch sets host quirk2 bit field for No 1.8V supported in case of
1.0 silicon. The 1.0 silicon doesn't have support for UHS-I modes. This
property will ensure the SD runs on High Speed mode.
Signed-off-by: Manish Narani <mnarani@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Diffstat (limited to 'arch/arm/dts/zynqmp.dtsi')
| -rw-r--r-- | arch/arm/dts/zynqmp.dtsi | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/arm/dts/zynqmp.dtsi b/arch/arm/dts/zynqmp.dtsi index 9516c799d5..0984077bac 100644 --- a/arch/arm/dts/zynqmp.dtsi +++ b/arch/arm/dts/zynqmp.dtsi @@ -837,6 +837,8 @@ #stream-id-cells = <1>; iommus = <&smmu 0x870>; power-domains = <&pd_sd0>; + nvmem-cells = <&soc_revision>; + nvmem-cell-names = "soc_revision"; }; sdhci1: sdhci@ff170000 { @@ -851,6 +853,8 @@ #stream-id-cells = <1>; iommus = <&smmu 0x871>; power-domains = <&pd_sd1>; + nvmem-cells = <&soc_revision>; + nvmem-cell-names = "soc_revision"; }; pinctrl0: pinctrl@ff180000 { |