diff options
| author | Kever Yang <kever.yang@rock-chips.com> | 2018-01-16 16:08:18 +0800 |
|---|---|---|
| committer | Philipp Tomsich <philipp.tomsich@theobroma-systems.com> | 2018-01-28 17:12:39 +0100 |
| commit | 2147c0d253fdacdf340049a670b675bc5f48dcb0 (patch) | |
| tree | 7f616015c8184ef61f08b4d247719100aee6f7e4 /arch/arm/dts | |
| parent | 75b381aae8dd5fbc3c6b3f453dc3ca9ce3c94ab4 (diff) | |
rockchip: dts: rk3128: update pwm-cell for pwm0
The backlight pwm-cell is 3.
This remove the warning in buildman:
arch/arm/dts/rk3126-evb.dtb: Warning (pwms_property): Property 'pwms', cell 3 is not a phandle reference in /backlight
arch/arm/dts/rk3126-evb.dtb: Warning (pwms_property): Missing property '#pwm-cells' in node /sram@10080400 or bad phandle (referred from /backlight:pwms[3])
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Diffstat (limited to 'arch/arm/dts')
| -rw-r--r-- | arch/arm/dts/rk3128.dtsi | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/arch/arm/dts/rk3128.dtsi b/arch/arm/dts/rk3128.dtsi index 3ef2737f5b..566543bf2d 100644 --- a/arch/arm/dts/rk3128.dtsi +++ b/arch/arm/dts/rk3128.dtsi @@ -315,7 +315,7 @@ pwm0: pwm0@20050000 { compatible = "rockchip,rk3128-pwm", "rockchip,rk3288-pwm"; reg = <0x20050000 0x10>; - #pwm-cells = <2>; + #pwm-cells = <3>; pinctrl-names = "default"; pinctrl-0 = <&pwm0_pin>; clocks = <&cru PCLK_PWM>; @@ -325,7 +325,7 @@ pwm1: pwm1@20050010 { compatible = "rockchip,rk3128-pwm", "rockchip,rk3288-pwm"; reg = <0x20050010 0x10>; - #pwm-cells = <2>; + #pwm-cells = <3>; pinctrl-names = "default"; pinctrl-0 = <&pwm1_pin>; clocks = <&cru PCLK_PWM>; @@ -335,7 +335,7 @@ pwm2: pwm2@20050020 { compatible = "rockchip,rk3128-pwm", "rockchip,rk3288-pwm"; reg = <0x20050020 0x10>; - #pwm-cells = <2>; + #pwm-cells = <3>; pinctrl-names = "default"; pinctrl-0 = <&pwm2_pin>; clocks = <&cru PCLK_PWM>; @@ -345,7 +345,7 @@ pwm3: pwm3@20050030 { compatible = "rockchip,rk3128-pwm", "rockchip,rk3288-pwm"; reg = <0x20050030 0x10>; - #pwm-cells = <2>; + #pwm-cells = <3>; pinctrl-names = "default"; pinctrl-0 = <&pwm3_pin>; clocks = <&cru PCLK_PWM>; |