Merge https://gitlab.denx.de/u-boot/custodians/u-boot-fsl-qoriq

- LS1046AFRWY support
- USB errata fix and secure boot defconfig support for LS1028A
- Enabled SDHC and SATA for LX2160
- LS1046A serdes fixes
- other minor fixes

5 files changed, 73 insertions, 4 deletions

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 528fb909d5..4dfc2c6309 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -342,6 +342,7 @@ dtb-$(CONFIG_FSL_LSCH2) += fsl-ls1043a-qds-duart.dtb \
 	fsl-ls1046a-qds-duart.dtb \
 	fsl-ls1046a-qds-lpuart.dtb \
 	fsl-ls1046a-rdb.dtb \
+	fsl-ls1046a-frwy.dtb \
 	fsl-ls1012a-qds.dtb \
 	fsl-ls1012a-rdb.dtb \
 	fsl-ls1012a-2g5rdb.dtb \
diff --git a/arch/arm/dts/fsl-ls1028a.dtsi b/arch/arm/dts/fsl-ls1028a.dtsi
index e6a443aa77..49074112c4 100644
--- a/arch/arm/dts/fsl-ls1028a.dtsi
+++ b/arch/arm/dts/fsl-ls1028a.dtsi
@@ -108,6 +108,17 @@
 		       0x82000000 0x0 0x40000000 0x88 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
 	};
 
+	pcie@1f0000000 {
+		compatible = "pci-host-ecam-generic";
+		/* ECAM bus 0, HW has more space reserved but not populated */
+		bus-range = <0x0 0x0>;
+		reg = <0x01 0xf0000000 0x0 0x100000>;
+		#address-cells = <3>;
+		#size-cells = <2>;
+		device_type = "pci";
+		ranges= <0x82000000 0x0 0x00000000 0x1 0xf8000000 0x0 0x160000>;
+	};
+
 	i2c0: i2c@2000000 {
 		compatible = "fsl,vf610-i2c";
 		#address-cells = <1>;
@@ -272,9 +283,10 @@
 
 	sata: sata@3200000 {
 		compatible = "fsl,ls1028a-ahci";
-		reg = <0x0 0x3200000 0x0 0x10000>;
+		reg = <0x0 0x3200000 0x0 0x10000	/* ccsr sata base */
+		       0x7 0x100520  0x0 0x4>;		/* ecc sata addr*/
+		reg-names = "sata-base", "ecc-addr";
 		interrupts = <0 133 4>;
-		clocks = <&clockgen 4 1>;
 		status = "disabled";
 	};
 
diff --git a/arch/arm/dts/fsl-ls1046a-frwy.dts b/arch/arm/dts/fsl-ls1046a-frwy.dts
new file mode 100644
index 0000000000..3d41e3bd44
--- /dev/null
+++ b/arch/arm/dts/fsl-ls1046a-frwy.dts
@@ -0,0 +1,34 @@
+// SPDX-License-Identifier: GPL-2.0+ OR X11
+/*
+ * Device Tree Include file for NXP Layerscape-1046A family SoC.
+ *
+ * Copyright 2019 NXP
+ *
+ */
+
+/dts-v1/;
+/include/ "fsl-ls1046a.dtsi"
+
+/ {
+	model = "LS1046A FRWY Board";
+
+	aliases {
+		spi0 = &qspi;
+	};
+
+};
+
+&qspi {
+	bus-num = <0>;
+	status = "okay";
+
+	qflash0: mt25qu512abb8esf@0 {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		compatible = "spi-flash";
+		spi-max-frequency = <50000000>;
+		reg = <0>;
+	};
+
+};
+
diff --git a/arch/arm/dts/fsl-lx2160a-qds.dts b/arch/arm/dts/fsl-lx2160a-qds.dts
index 6192156fc3..99836c4ccb 100644
--- a/arch/arm/dts/fsl-lx2160a-qds.dts
+++ b/arch/arm/dts/fsl-lx2160a-qds.dts
@@ -15,3 +15,26 @@
 	compatible = "fsl,lx2160aqds", "fsl,lx2160a";
 };
 
+&esdhc0 {
+	status = "okay";
+};
+
+&esdhc1 {
+	status = "okay";
+};
+
+&sata0 {
+	status = "okay";
+};
+
+&sata1 {
+	status = "okay";
+};
+
+&sata2 {
+	status = "okay";
+};
+
+&sata3 {
+	status = "okay";
+};
diff --git a/arch/arm/dts/ls1021a.dtsi b/arch/arm/dts/ls1021a.dtsi
index 8a0f473e25..7fb24ab687 100644
--- a/arch/arm/dts/ls1021a.dtsi
+++ b/arch/arm/dts/ls1021a.dtsi
@@ -406,8 +406,7 @@
 
 		sata: sata@3200000 {
 			compatible = "fsl,ls1021a-ahci";
-			reg = <0x0 0x3200000 0x0 0x10000 /* ccsr sata base */
-			       0x0 0x20220520 0x0 0x4>;	 /* ecc sata addr*/
+			reg = <0x3200000 0x10000 0x20220520 0x4>;
 			reg-names = "sata-base", "ecc-addr";
 			interrupts = <0 101 4>;
 			status = "disabled";