diff options
| author | Anurag Kumar Vulisha <anurag.kumar.vulisha@xilinx.com> | 2017-03-02 14:40:51 +0530 |
|---|---|---|
| committer | Michal Simek <michal.simek@xilinx.com> | 2017-11-28 16:09:15 +0100 |
| commit | 8e5a4e6f0ec7d475fc32b7f8083c9aefb9723fad (patch) | |
| tree | e4408dace07456b4b9c9078d479101870622f08e /arch/arm/dts | |
| parent | b0c55207bfa4d45bf757a6915e1c9a33f1ef2187 (diff) | |
arm64: zynqmp: Add support reading SoC revision using nvmem driver in dwc3
This patch adds support for reading silicon revision using zynqmp nvmem
driver.
Signed-off-by: Anurag Kumar Vulisha <anuragku@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Diffstat (limited to 'arch/arm/dts')
| -rw-r--r-- | arch/arm/dts/zynqmp.dtsi | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/arm/dts/zynqmp.dtsi b/arch/arm/dts/zynqmp.dtsi index 10a53bb9f0..dce5da4e06 100644 --- a/arch/arm/dts/zynqmp.dtsi +++ b/arch/arm/dts/zynqmp.dtsi @@ -1022,6 +1022,8 @@ iommus = <&smmu 0x860>; power-domains = <&pd_usb0>; ranges; + nvmem-cells = <&soc_revision>; + nvmem-cell-names = "soc_revision"; dwc3_0: dwc3@fe200000 { compatible = "snps,dwc3"; @@ -1045,6 +1047,8 @@ iommus = <&smmu 0x861>; power-domains = <&pd_usb1>; ranges; + nvmem-cells = <&soc_revision>; + nvmem-cell-names = "soc_revision"; dwc3_1: dwc3@fe300000 { compatible = "snps,dwc3"; |