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authorMarek Vasut <marex@denx.de>2019-05-07 17:55:12 +0200
committerMarek Vasut <marex@denx.de>2019-05-14 19:53:16 +0200
commit9e6ed1a3466ea35d98e074187abcbcfee550b448 (patch)
tree56c9b29a7faffa50c28b62f17eb9f49bdba981be /arch/arm/dts
parent917bd8a876b5891c6624a726ed6f5822d84a79f2 (diff)
ARM: dts: socfpga: Keep FPGA bridge entries in SPL DT
Keep the FPGA bridge entries in SPL DT to let do_bridge_reset() toggle the bridges on/off as needed according to the handoff file. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <chin.liang.see@intel.com> Cc: Dinh Nguyen <dinguyen@kernel.org> Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Cc: Tien Fong Chee <tien.fong.chee@intel.com>
Diffstat (limited to 'arch/arm/dts')
-rw-r--r--arch/arm/dts/socfpga_arria10_handoff_u-boot.dtsi24
1 files changed, 24 insertions, 0 deletions
diff --git a/arch/arm/dts/socfpga_arria10_handoff_u-boot.dtsi b/arch/arm/dts/socfpga_arria10_handoff_u-boot.dtsi
index 39a8d9a3e7..ef215230c2 100644
--- a/arch/arm/dts/socfpga_arria10_handoff_u-boot.dtsi
+++ b/arch/arm/dts/socfpga_arria10_handoff_u-boot.dtsi
@@ -64,4 +64,28 @@
u-boot,dm-pre-reloc;
};
};
+
+ fpgabridge@0 {
+ u-boot,dm-pre-reloc;
+ };
+
+ fpgabridge@1 {
+ u-boot,dm-pre-reloc;
+ };
+
+ fpgabridge@2 {
+ u-boot,dm-pre-reloc;
+ };
+
+ fpgabridge@3 {
+ u-boot,dm-pre-reloc;
+ };
+
+ fpgabridge@4 {
+ u-boot,dm-pre-reloc;
+ };
+
+ fpgabridge@5 {
+ u-boot,dm-pre-reloc;
+ };
};