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authorAndy Yan <andy.yan@rock-chips.com>2019-11-26 21:15:39 +0800
committerKever Yang <kever.yang@rock-chips.com>2019-12-05 23:53:07 +0800
commitafe18f205e269682edd680cb4a5bcbe2094ea58b (patch)
tree9ebe883d2b5b3870701e0b1a3220a4bcba013b66 /arch/arm/dts
parent081a51c937952b91957873badafa11ad2a025315 (diff)
rockchip: px5: enable spl-fifo-mode for emmc for px5-evb
We need load some parts of ATF to sram, but rockchip dwmmc controllers can't do dma to non-ddr addresses space, so set the mmc controller into fifo mode in spl. Signed-off-by: Andy Yan <andy.yan@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Diffstat (limited to 'arch/arm/dts')
-rw-r--r--arch/arm/dts/rk3368-px5-evb-u-boot.dtsi2
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm/dts/rk3368-px5-evb-u-boot.dtsi b/arch/arm/dts/rk3368-px5-evb-u-boot.dtsi
index 002767a033..936ce55727 100644
--- a/arch/arm/dts/rk3368-px5-evb-u-boot.dtsi
+++ b/arch/arm/dts/rk3368-px5-evb-u-boot.dtsi
@@ -58,6 +58,8 @@
};
&emmc {
+ /* mmc to sram can't do dma, prevent aborts transferring TF-A parts */
+ u-boot,spl-fifo-mode;
u-boot,dm-pre-reloc;
};