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authorMarek Vasut <marek.vasut+renesas@gmail.com>2019-03-04 12:28:31 +0100
committerMarek Vasut <marex@denx.de>2019-04-09 18:19:10 +0200
commitb414ab70cde2ae9467bd2120171dbdfa72df5231 (patch)
tree7aac0c6c042f0a299e90fdb21df2451f85f01e15 /arch/arm/dts
parentc6435c317a7853fdde20a67af01e810a87e3d989 (diff)
ARM: dts: rmobile: Import R8A77965 M3NULCB DTs
Import R8A77965 M3N ULCB device trees from Linux 5.0 , commit 1c163f4c7b3f621efff9b28a47abb36f7378d783 . Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Diffstat (limited to 'arch/arm/dts')
-rw-r--r--arch/arm/dts/Makefile1
-rw-r--r--arch/arm/dts/r8a77965-m3nulcb-u-boot.dts43
-rw-r--r--arch/arm/dts/r8a77965-m3nulcb.dts33
3 files changed, 77 insertions, 0 deletions
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 0e2ffdb87f..8a4efee1b7 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -567,6 +567,7 @@ dtb-$(CONFIG_RCAR_GEN3) += \
r8a7795-salvator-x-u-boot.dtb \
r8a7796-m3ulcb-u-boot.dtb \
r8a7796-salvator-x-u-boot.dtb \
+ r8a77965-m3nulcb-u-boot.dtb \
r8a77965-salvator-x-u-boot.dtb \
r8a77970-eagle-u-boot.dtb \
r8a77990-ebisu-u-boot.dtb \
diff --git a/arch/arm/dts/r8a77965-m3nulcb-u-boot.dts b/arch/arm/dts/r8a77965-m3nulcb-u-boot.dts
new file mode 100644
index 0000000000..c4700910d4
--- /dev/null
+++ b/arch/arm/dts/r8a77965-m3nulcb-u-boot.dts
@@ -0,0 +1,43 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Device Tree Source extras for U-Boot for the ULCB board
+ *
+ * Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com>
+ */
+
+#include "r8a77965-m3nulcb.dts"
+#include "r8a77965-u-boot.dtsi"
+
+/ {
+ cpld {
+ compatible = "renesas,ulcb-cpld";
+ status = "okay";
+ gpio-sck = <&gpio6 8 0>;
+ gpio-mosi = <&gpio6 7 0>;
+ gpio-miso = <&gpio6 10 0>;
+ gpio-sstbz = <&gpio2 3 0>;
+ };
+};
+
+&sdhi2_pins {
+ groups = "sdhi2_data8", "sdhi2_ctrl", "sdhi2_ds";
+ power-source = <1800>;
+};
+
+&sdhi2_pins_uhs {
+ groups = "sdhi2_data8", "sdhi2_ctrl", "sdhi2_ds";
+};
+
+&sdhi0 {
+ sd-uhs-sdr12;
+ sd-uhs-sdr25;
+ sd-uhs-sdr104;
+ max-frequency = <208000000>;
+ status = "okay";
+};
+
+&sdhi2 {
+ mmc-hs400-1_8v;
+ max-frequency = <200000000>;
+ status = "okay";
+};
diff --git a/arch/arm/dts/r8a77965-m3nulcb.dts b/arch/arm/dts/r8a77965-m3nulcb.dts
new file mode 100644
index 0000000000..964078b6cc
--- /dev/null
+++ b/arch/arm/dts/r8a77965-m3nulcb.dts
@@ -0,0 +1,33 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Device Tree Source for the M3NULCB (R-Car Starter Kit Pro) board
+ *
+ * Copyright (C) 2018 Renesas Electronics Corp.
+ * Copyright (C) 2018 Cogent Embedded, Inc.
+ */
+
+/dts-v1/;
+#include "r8a77965.dtsi"
+#include "ulcb.dtsi"
+
+/ {
+ model = "Renesas M3NULCB board based on r8a77965";
+ compatible = "renesas,m3nulcb", "renesas,r8a77965";
+
+ memory@48000000 {
+ device_type = "memory";
+ /* first 128MB is reserved for secure area. */
+ reg = <0x0 0x48000000 0x0 0x78000000>;
+ };
+};
+
+&du {
+ clocks = <&cpg CPG_MOD 724>,
+ <&cpg CPG_MOD 723>,
+ <&cpg CPG_MOD 721>,
+ <&versaclock5 1>,
+ <&versaclock5 3>,
+ <&versaclock5 2>;
+ clock-names = "du.0", "du.1", "du.3",
+ "dclkin.0", "dclkin.1", "dclkin.3";
+};