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| author | Tom Rini <trini@konsulko.com> | 2020-07-07 12:55:57 -0400 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2020-07-07 12:55:57 -0400 |
| commit | c4df37bfa916d6516d67dde6ef9d1b18b36041d3 (patch) | |
| tree | 983277a53c1643566863e8ae73950a931dc661b5 /arch/arm/dts | |
| parent | f8ddd8cbb513cefcdd4beeff0cd25ba8f97a5860 (diff) | |
| parent | 59dab842f98f9144bce1e535ef9df6f0e1a25e03 (diff) | |
Merge tag 'u-boot-atmel-2020.10-a' of https://gitlab.denx.de/u-boot/custodians/u-boot-atmel
First set of u-boot-atmel features for 2020.10 cycle
Diffstat (limited to 'arch/arm/dts')
| -rw-r--r-- | arch/arm/dts/sama5d3.dtsi | 12 | ||||
| -rw-r--r-- | arch/arm/dts/sama5d4.dtsi | 12 |
2 files changed, 12 insertions, 12 deletions
diff --git a/arch/arm/dts/sama5d3.dtsi b/arch/arm/dts/sama5d3.dtsi index 7db66c5d50..6ed218eaad 100644 --- a/arch/arm/dts/sama5d3.dtsi +++ b/arch/arm/dts/sama5d3.dtsi @@ -1447,37 +1447,37 @@ atmel,nb-banks = <2>; }; - ep10: endpoint@10 { + ep10: endpoint@a { reg = <10>; atmel,fifo-size = <1024>; atmel,nb-banks = <2>; }; - ep11: endpoint@11 { + ep11: endpoint@b { reg = <11>; atmel,fifo-size = <1024>; atmel,nb-banks = <2>; }; - ep12: endpoint@12 { + ep12: endpoint@c { reg = <12>; atmel,fifo-size = <1024>; atmel,nb-banks = <2>; }; - ep13: endpoint@13 { + ep13: endpoint@d { reg = <13>; atmel,fifo-size = <1024>; atmel,nb-banks = <2>; }; - ep14: endpoint@14 { + ep14: endpoint@e { reg = <14>; atmel,fifo-size = <1024>; atmel,nb-banks = <2>; }; - ep15: endpoint@15 { + ep15: endpoint@f { reg = <15>; atmel,fifo-size = <1024>; atmel,nb-banks = <2>; diff --git a/arch/arm/dts/sama5d4.dtsi b/arch/arm/dts/sama5d4.dtsi index 8875d7ba76..e1df24cdbe 100644 --- a/arch/arm/dts/sama5d4.dtsi +++ b/arch/arm/dts/sama5d4.dtsi @@ -212,42 +212,42 @@ atmel,can-isoc; }; - ep10: endpoint@10 { + ep10: endpoint@a { reg = <10>; atmel,fifo-size = <1024>; atmel,nb-banks = <2>; atmel,can-isoc; }; - ep11: endpoint@11 { + ep11: endpoint@b { reg = <11>; atmel,fifo-size = <1024>; atmel,nb-banks = <2>; atmel,can-isoc; }; - ep12: endpoint@12 { + ep12: endpoint@c { reg = <12>; atmel,fifo-size = <1024>; atmel,nb-banks = <2>; atmel,can-isoc; }; - ep13: endpoint@13 { + ep13: endpoint@d { reg = <13>; atmel,fifo-size = <1024>; atmel,nb-banks = <2>; atmel,can-isoc; }; - ep14: endpoint@14 { + ep14: endpoint@e { reg = <14>; atmel,fifo-size = <1024>; atmel,nb-banks = <2>; atmel,can-isoc; }; - ep15: endpoint@15 { + ep15: endpoint@f { reg = <15>; atmel,fifo-size = <1024>; atmel,nb-banks = <2>; |