summaryrefslogtreecommitdiff
path: root/arch/arm/dts
diff options
context:
space:
mode:
authorStefan Agner <stefan.agner@toradex.com>2019-01-08 12:42:29 +0100
committerStefano Babic <sbabic@denx.de>2019-01-28 13:02:08 +0100
commitd8a32f52a6fc21c012e55ac5fbcc245493b515b7 (patch)
tree8a26e772c44b6a93ee6c3374ade6c9eb47a970ea /arch/arm/dts
parent2bc18ce570ab4f1ba91974376bb5377ca4990203 (diff)
arm: dts: imx7: colibri: split dt for raw NAND and eMMC devices
In preparation of adding CONFIG_DM_MMC support use separate device trees for raw NAND and eMMC devices. Signed-off-by: Stefan Agner <stefan.agner@toradex.com> Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Diffstat (limited to 'arch/arm/dts')
-rw-r--r--arch/arm/dts/Makefile3
-rw-r--r--arch/arm/dts/imx7-colibri-emmc.dts16
-rw-r--r--arch/arm/dts/imx7-colibri-rawnand.dts46
-rw-r--r--arch/arm/dts/imx7-colibri.dtsi (renamed from arch/arm/dts/imx7-colibri.dts)39
4 files changed, 64 insertions, 40 deletions
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 0e0bad9471..46f1d693dc 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -464,8 +464,7 @@ dtb-$(CONFIG_MX6UL) += \
dtb-$(CONFIG_MX6ULL) += imx6ull-14x14-evk.dtb
-dtb-$(CONFIG_MX7) += imx7-colibri.dtb \
- imx7d-sdb.dtb \
+dtb-$(CONFIG_MX7) += imx7d-sdb.dtb \
imx7d-sdb-qspi.dtb
dtb-$(CONFIG_ARCH_MX7ULP) += imx7ulp-evk.dtb
diff --git a/arch/arm/dts/imx7-colibri-emmc.dts b/arch/arm/dts/imx7-colibri-emmc.dts
new file mode 100644
index 0000000000..295ca05916
--- /dev/null
+++ b/arch/arm/dts/imx7-colibri-emmc.dts
@@ -0,0 +1,16 @@
+// SPDX-License-Identifier: GPL-2.0+ OR X11
+/*
+ * Copyright 2019 Toradex AG
+ */
+
+/dts-v1/;
+#include "imx7-colibri.dtsi"
+
+/ {
+ model = "Toradex Colibri iMX7D 1GB (eMMC)";
+ compatible = "toradex,imx7d-colibri-emmc", "fsl,imx7d";
+
+ chosen {
+ stdout-path = &uart1;
+ };
+};
diff --git a/arch/arm/dts/imx7-colibri-rawnand.dts b/arch/arm/dts/imx7-colibri-rawnand.dts
new file mode 100644
index 0000000000..4eb86fb011
--- /dev/null
+++ b/arch/arm/dts/imx7-colibri-rawnand.dts
@@ -0,0 +1,46 @@
+// SPDX-License-Identifier: GPL-2.0+ OR X11
+/*
+ * Copyright 2019 Toradex AG
+ */
+
+/dts-v1/;
+#include "imx7-colibri.dtsi"
+
+/ {
+ model = "Toradex Colibri iMX7S/D";
+ compatible = "toradex,imx7-colibri", "fsl,imx7";
+
+ chosen {
+ stdout-path = &uart1;
+ };
+};
+
+&gpmi {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_gpmi_nand>;
+ fsl,use-minimum-ecc;
+ nand-on-flash-bbt;
+ nand-ecc-mode = "hw";
+ status = "okay";
+};
+
+&iomuxc {
+ pinctrl_gpmi_nand: gpmi-nand-grp {
+ fsl,pins = <
+ MX7D_PAD_SD3_CLK__NAND_CLE 0x71
+ MX7D_PAD_SD3_CMD__NAND_ALE 0x71
+ MX7D_PAD_SAI1_TX_BCLK__NAND_CE0_B 0x71
+ MX7D_PAD_SAI1_TX_DATA__NAND_READY_B 0x74
+ MX7D_PAD_SD3_STROBE__NAND_RE_B 0x71
+ MX7D_PAD_SD3_RESET_B__NAND_WE_B 0x71
+ MX7D_PAD_SD3_DATA0__NAND_DATA00 0x71
+ MX7D_PAD_SD3_DATA1__NAND_DATA01 0x71
+ MX7D_PAD_SD3_DATA2__NAND_DATA02 0x71
+ MX7D_PAD_SD3_DATA3__NAND_DATA03 0x71
+ MX7D_PAD_SD3_DATA4__NAND_DATA04 0x71
+ MX7D_PAD_SD3_DATA5__NAND_DATA05 0x71
+ MX7D_PAD_SD3_DATA6__NAND_DATA06 0x71
+ MX7D_PAD_SD3_DATA7__NAND_DATA07 0x71
+ >;
+ };
+};
diff --git a/arch/arm/dts/imx7-colibri.dts b/arch/arm/dts/imx7-colibri.dtsi
index dca501be25..47295117aa 100644
--- a/arch/arm/dts/imx7-colibri.dts
+++ b/arch/arm/dts/imx7-colibri.dtsi
@@ -1,30 +1,12 @@
// SPDX-License-Identifier: GPL-2.0+ OR X11
/*
- * Copyright 2016 Toradex AG
+ * Copyright 2016-2019 Toradex AG
*/
/dts-v1/;
#include <dt-bindings/gpio/gpio.h>
#include "imx7d.dtsi"
-/ {
- model = "Toradex Colibri iMX7S/D";
- compatible = "toradex,imx7-colibri", "fsl,imx7";
-
- chosen {
- stdout-path = &uart1;
- };
-};
-
-&gpmi {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_gpmi_nand>;
- fsl,use-minimum-ecc;
- nand-on-flash-bbt;
- nand-ecc-mode = "hw";
- status = "okay";
-};
-
&i2c1 {
pinctrl-names = "default", "gpio";
pinctrl-0 = <&pinctrl_i2c1>;
@@ -57,25 +39,6 @@
};
&iomuxc {
- pinctrl_gpmi_nand: gpmi-nand-grp {
- fsl,pins = <
- MX7D_PAD_SD3_CLK__NAND_CLE 0x71
- MX7D_PAD_SD3_CMD__NAND_ALE 0x71
- MX7D_PAD_SAI1_TX_BCLK__NAND_CE0_B 0x71
- MX7D_PAD_SAI1_TX_DATA__NAND_READY_B 0x74
- MX7D_PAD_SD3_STROBE__NAND_RE_B 0x71
- MX7D_PAD_SD3_RESET_B__NAND_WE_B 0x71
- MX7D_PAD_SD3_DATA0__NAND_DATA00 0x71
- MX7D_PAD_SD3_DATA1__NAND_DATA01 0x71
- MX7D_PAD_SD3_DATA2__NAND_DATA02 0x71
- MX7D_PAD_SD3_DATA3__NAND_DATA03 0x71
- MX7D_PAD_SD3_DATA4__NAND_DATA04 0x71
- MX7D_PAD_SD3_DATA5__NAND_DATA05 0x71
- MX7D_PAD_SD3_DATA6__NAND_DATA06 0x71
- MX7D_PAD_SD3_DATA7__NAND_DATA07 0x71
- >;
- };
-
pinctrl_i2c4: i2c4-grp {
fsl,pins = <
MX7D_PAD_ENET1_RGMII_TD3__I2C4_SDA 0x4000007f