diff options
author | Jagan Teki <jagan@amarulasolutions.com> | 2019-07-16 17:27:43 +0530 |
---|---|---|
committer | Kever Yang <kever.yang@rock-chips.com> | 2019-07-21 00:00:41 +0800 |
commit | f797651f804d2c53fad306b36454f78e72183249 (patch) | |
tree | 7209eff3258dd6869d7837e380ea0704b48a0bda /arch/arm/dts | |
parent | ecd8136e5230ecfcb01d5fba046b4bb895f21419 (diff) |
rockchip: dts: rk3399: Add LPDDR4-100 timings
Add sdram timings for LPDDR4-100 via rk3399-sdram-lpddr4-100.dtsi file.
all timings are dumped from rkbin/bin/rk33/rk3399_ddr_800MHz_v1.20.bin
Associated LPDDR4 board -u-boot.dtsi can include this to make these
timings available during SPL or TPL stages.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: YouMin Chen <cym@rock-chips.com>
Reviewed-by: Kever Yang <Kever.yang@rock-chips.com>
Diffstat (limited to 'arch/arm/dts')
-rw-r--r-- | arch/arm/dts/rk3399-sdram-lpddr4-100.dtsi | 1537 |
1 files changed, 1537 insertions, 0 deletions
diff --git a/arch/arm/dts/rk3399-sdram-lpddr4-100.dtsi b/arch/arm/dts/rk3399-sdram-lpddr4-100.dtsi new file mode 100644 index 0000000000..4a4414a960 --- /dev/null +++ b/arch/arm/dts/rk3399-sdram-lpddr4-100.dtsi @@ -0,0 +1,1537 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * (C) Copyright 2019 Rockchip Electronics Co., Ltd + * (C) Copyright 2019 Amarula Solutions. + * Author: Jagan Teki <jagan@amarulasolutions.com> + */ + +&dmc { + rockchip,sdram-params = < + 0x2 + 0xa + 0x3 + 0x2 + 0x1 + 0x0 + 0xf + 0xf + 1 + 0x80241d22 + 0x15050f08 + 0x00000602 + 0x00002122 + 0x0000004c + 0x00000000 + 0x2 + 0xa + 0x3 + 0x2 + 0x1 + 0x0 + 0xf + 0xf + 1 + 0x80241d22 + 0x15050f08 + 0x00000602 + 0x00002122 + 0x0000004c + 0x00000000 + 50 + 7 + 2 + 13 + 1 + 0x00000b00 + 0x00000000 + 0x00000000 + 0x00000000 + 0x00000000 + 0x00013880 + 0x000c3500 + 0x00000005 + 0x00000320 + 0x00027100 + 0x00186a00 + 0x00000005 + 0x00000640 + 0x00002710 + 0x000186a0 + 0x00000005 + 0x01000064 + 0x00000000 + 0x02020101 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