diff options
| author | TENART Antoine <atenart@adeneo-embedded.com> | 2013-07-02 12:05:59 +0200 |
|---|---|---|
| committer | Tom Rini <trini@ti.com> | 2013-08-15 18:38:37 -0400 |
| commit | dcf846d5dae75b81eccce46c577fd3957e73d474 (patch) | |
| tree | a407cd99afb98ec46ce48dae285041fc986038e4 /arch/arm/include/asm/arch-am33xx/hardware_am33xx.h | |
| parent | 9ed6e41239e17c97d786219b5ffca4a8a118c71f (diff) | |
Add TI816X support
Signed-off-by: Antoine Tenart <atenart@adeneo-embedded.com>
[trini: Fix warnings about vtp things in emif4.c, adapt AM43XX]
Signed-off-by: Tom Rini <trini@ti.com>
Diffstat (limited to 'arch/arm/include/asm/arch-am33xx/hardware_am33xx.h')
| -rw-r--r-- | arch/arm/include/asm/arch-am33xx/hardware_am33xx.h | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch-am33xx/hardware_am33xx.h b/arch/arm/include/asm/arch-am33xx/hardware_am33xx.h index 5297c63af3..8973fd884f 100644 --- a/arch/arm/include/asm/arch-am33xx/hardware_am33xx.h +++ b/arch/arm/include/asm/arch-am33xx/hardware_am33xx.h @@ -36,12 +36,18 @@ /* VTP Base address */ #define VTP0_CTRL_ADDR 0x44E10E0C +#define VTP1_CTRL_ADDR 0x48140E10 /* DDR Base address */ #define DDR_PHY_CMD_ADDR 0x44E12000 #define DDR_PHY_DATA_ADDR 0x44E120C8 +#define DDR_PHY_CMD_ADDR2 0x47C0C800 +#define DDR_PHY_DATA_ADDR2 0x47C0C8C8 #define DDR_DATA_REGS_NR 2 +#define DDRPHY_0_CONFIG_BASE (CTRL_BASE + 0x1400) +#define DDRPHY_CONFIG_BASE DDRPHY_0_CONFIG_BASE + /* CPSW Config space */ #define CPSW_MDIO_BASE 0x4A101000 |