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authorTom Rini <trini@ti.com>2013-03-18 12:31:00 -0400
committerTom Rini <trini@ti.com>2013-03-18 14:37:18 -0400
commit0ce033d2582129243aca10d3072a221386bbba44 (patch)
tree6e50a3f4eed22007549dc740d0fa647a6c8cec5b /arch/arm/include/asm/arch-am33xx
parentb5bec88434adb52413f1bc33fa63d7642cb8fd35 (diff)
parentb27673ccbd3d5435319b5c09c3e7061f559f925d (diff)
Merge branch 'master' of git://git.denx.de/u-boot-arm
Albert's rework of the linker scripts conflicted with Simon's making everyone use __bss_end. We also had a minor conflict over README.scrapyard being added to in mainline and enhanced in u-boot-arm/master with proper formatting. Conflicts: arch/arm/cpu/ixp/u-boot.lds arch/arm/cpu/u-boot.lds arch/arm/lib/Makefile board/actux1/u-boot.lds board/actux2/u-boot.lds board/actux3/u-boot.lds board/dvlhost/u-boot.lds board/freescale/mx31ads/u-boot.lds doc/README.scrapyard include/configs/tegra-common.h Build tested for all of ARM and run-time tested on am335x_evm. Signed-off-by: Tom Rini <trini@ti.com>
Diffstat (limited to 'arch/arm/include/asm/arch-am33xx')
-rw-r--r--arch/arm/include/asm/arch-am33xx/mmc_host_def.h140
-rw-r--r--arch/arm/include/asm/arch-am33xx/spl.h1
-rw-r--r--arch/arm/include/asm/arch-am33xx/sys_proto.h2
3 files changed, 5 insertions, 138 deletions
diff --git a/arch/arm/include/asm/arch-am33xx/mmc_host_def.h b/arch/arm/include/asm/arch-am33xx/mmc_host_def.h
index 1f597c0eec..33c9c83892 100644
--- a/arch/arm/include/asm/arch-am33xx/mmc_host_def.h
+++ b/arch/arm/include/asm/arch-am33xx/mmc_host_def.h
@@ -16,148 +16,12 @@
#ifndef MMC_HOST_DEF_H
#define MMC_HOST_DEF_H
+#include <asm/omap_mmc.h>
+
/*
* OMAP HSMMC register definitions
*/
#define OMAP_HSMMC1_BASE 0x48060100
#define OMAP_HSMMC2_BASE 0x481D8100
-typedef struct hsmmc {
- unsigned char res1[0x10];
- unsigned int sysconfig; /* 0x10 */
- unsigned int sysstatus; /* 0x14 */
- unsigned char res2[0x14];
- unsigned int con; /* 0x2C */
- unsigned char res3[0xD4];
- unsigned int blk; /* 0x104 */
- unsigned int arg; /* 0x108 */
- unsigned int cmd; /* 0x10C */
- unsigned int rsp10; /* 0x110 */
- unsigned int rsp32; /* 0x114 */
- unsigned int rsp54; /* 0x118 */
- unsigned int rsp76; /* 0x11C */
- unsigned int data; /* 0x120 */
- unsigned int pstate; /* 0x124 */
- unsigned int hctl; /* 0x128 */
- unsigned int sysctl; /* 0x12C */
- unsigned int stat; /* 0x130 */
- unsigned int ie; /* 0x134 */
- unsigned char res4[0x8];
- unsigned int capa; /* 0x140 */
-} hsmmc_t;
-
-/*
- * OMAP HS MMC Bit definitions
- */
-#define MMC_SOFTRESET (0x1 << 1)
-#define RESETDONE (0x1 << 0)
-#define NOOPENDRAIN (0x0 << 0)
-#define OPENDRAIN (0x1 << 0)
-#define OD (0x1 << 0)
-#define INIT_NOINIT (0x0 << 1)
-#define INIT_INITSTREAM (0x1 << 1)
-#define HR_NOHOSTRESP (0x0 << 2)
-#define STR_BLOCK (0x0 << 3)
-#define MODE_FUNC (0x0 << 4)
-#define DW8_1_4BITMODE (0x0 << 5)
-#define MIT_CTO (0x0 << 6)
-#define CDP_ACTIVEHIGH (0x0 << 7)
-#define WPP_ACTIVEHIGH (0x0 << 8)
-#define RESERVED_MASK (0x3 << 9)
-#define CTPL_MMC_SD (0x0 << 11)
-#define BLEN_512BYTESLEN (0x200 << 0)
-#define NBLK_STPCNT (0x0 << 16)
-#define DE_DISABLE (0x0 << 0)
-#define BCE_DISABLE (0x0 << 1)
-#define BCE_ENABLE (0x1 << 1)
-#define ACEN_DISABLE (0x0 << 2)
-#define DDIR_OFFSET (4)
-#define DDIR_MASK (0x1 << 4)
-#define DDIR_WRITE (0x0 << 4)
-#define DDIR_READ (0x1 << 4)
-#define MSBS_SGLEBLK (0x0 << 5)
-#define MSBS_MULTIBLK (0x1 << 5)
-#define RSP_TYPE_OFFSET (16)
-#define RSP_TYPE_MASK (0x3 << 16)
-#define RSP_TYPE_NORSP (0x0 << 16)
-#define RSP_TYPE_LGHT136 (0x1 << 16)
-#define RSP_TYPE_LGHT48 (0x2 << 16)
-#define RSP_TYPE_LGHT48B (0x3 << 16)
-#define CCCE_NOCHECK (0x0 << 19)
-#define CCCE_CHECK (0x1 << 19)
-#define CICE_NOCHECK (0x0 << 20)
-#define CICE_CHECK (0x1 << 20)
-#define DP_OFFSET (21)
-#define DP_MASK (0x1 << 21)
-#define DP_NO_DATA (0x0 << 21)
-#define DP_DATA (0x1 << 21)
-#define CMD_TYPE_NORMAL (0x0 << 22)
-#define INDEX_OFFSET (24)
-#define INDEX_MASK (0x3f << 24)
-#define INDEX(i) (i << 24)
-#define DATI_MASK (0x1 << 1)
-#define CMDI_MASK (0x1 << 0)
-#define DTW_1_BITMODE (0x0 << 1)
-#define DTW_4_BITMODE (0x1 << 1)
-#define DTW_8_BITMODE (0x1 << 5) /* CON[DW8]*/
-#define SDBP_PWROFF (0x0 << 8)
-#define SDBP_PWRON (0x1 << 8)
-#define SDVS_1V8 (0x5 << 9)
-#define SDVS_3V0 (0x6 << 9)
-#define ICE_MASK (0x1 << 0)
-#define ICE_STOP (0x0 << 0)
-#define ICS_MASK (0x1 << 1)
-#define ICS_NOTREADY (0x0 << 1)
-#define ICE_OSCILLATE (0x1 << 0)
-#define CEN_MASK (0x1 << 2)
-#define CEN_DISABLE (0x0 << 2)
-#define CEN_ENABLE (0x1 << 2)
-#define CLKD_OFFSET (6)
-#define CLKD_MASK (0x3FF << 6)
-#define DTO_MASK (0xF << 16)
-#define DTO_15THDTO (0xE << 16)
-#define SOFTRESETALL (0x1 << 24)
-#define CC_MASK (0x1 << 0)
-#define TC_MASK (0x1 << 1)
-#define BWR_MASK (0x1 << 4)
-#define BRR_MASK (0x1 << 5)
-#define ERRI_MASK (0x1 << 15)
-#define IE_CC (0x01 << 0)
-#define IE_TC (0x01 << 1)
-#define IE_BWR (0x01 << 4)
-#define IE_BRR (0x01 << 5)
-#define IE_CTO (0x01 << 16)
-#define IE_CCRC (0x01 << 17)
-#define IE_CEB (0x01 << 18)
-#define IE_CIE (0x01 << 19)
-#define IE_DTO (0x01 << 20)
-#define IE_DCRC (0x01 << 21)
-#define IE_DEB (0x01 << 22)
-#define IE_CERR (0x01 << 28)
-#define IE_BADA (0x01 << 29)
-
-#define VS30_3V0SUP (1 << 25)
-#define VS18_1V8SUP (1 << 26)
-
-/* Driver definitions */
-#define MMCSD_SECTOR_SIZE 512
-#define MMC_CARD 0
-#define SD_CARD 1
-#define BYTE_MODE 0
-#define SECTOR_MODE 1
-#define CLK_INITSEQ 0
-#define CLK_400KHZ 1
-#define CLK_MISC 2
-
-#define RSP_TYPE_NONE (RSP_TYPE_NORSP | CCCE_NOCHECK | CICE_NOCHECK)
-#define MMC_CMD0 (INDEX(0) | RSP_TYPE_NONE | DP_NO_DATA | DDIR_WRITE)
-
-/* Clock Configurations and Macros */
-#define MMC_CLOCK_REFERENCE 96 /* MHz */
-
-#define mmc_reg_out(addr, mask, val)\
- writel((readl(addr) & (~(mask))) | ((val) & (mask)), (addr))
-
-int omap_mmc_init(int dev_index, uint host_caps_mask, uint f_max);
-
#endif /* MMC_HOST_DEF_H */
diff --git a/arch/arm/include/asm/arch-am33xx/spl.h b/arch/arm/include/asm/arch-am33xx/spl.h
index 644ff353fe..e961ce0578 100644
--- a/arch/arm/include/asm/arch-am33xx/spl.h
+++ b/arch/arm/include/asm/arch-am33xx/spl.h
@@ -29,6 +29,7 @@
#define BOOT_DEVICE_MMC2 9 /* eMMC or daughter card */
#define BOOT_DEVICE_SPI 11
#define BOOT_DEVICE_UART 65
+#define BOOT_DEVICE_USBETH 68
#define BOOT_DEVICE_CPGMAC 70
#define BOOT_DEVICE_MMC2_2 0xFF
#endif
diff --git a/arch/arm/include/asm/arch-am33xx/sys_proto.h b/arch/arm/include/asm/arch-am33xx/sys_proto.h
index 588d8de82f..97ab60d1b2 100644
--- a/arch/arm/include/asm/arch-am33xx/sys_proto.h
+++ b/arch/arm/include/asm/arch-am33xx/sys_proto.h
@@ -35,5 +35,7 @@ void ddr_pll_config(unsigned int ddrpll_M);
void sdelay(unsigned long);
void gpmc_init(void);
+void enable_gpmc_cs_config(const u32 *gpmc_config, struct gpmc_cs *cs, u32 base,
+ u32 size);
void omap_nand_switch_ecc(int);
#endif