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authorWolfgang Denk <wd@denx.de>2011-11-08 00:38:52 +0100
committerWolfgang Denk <wd@denx.de>2011-11-08 00:38:52 +0100
commit688d8f33f27ea596efb6632388ee60360996eed0 (patch)
tree961e812048557d4ac7062e6a7387f543e7d634af /arch/arm/include/asm/arch-davinci/psc_defs.h
parent7ba6d591b5a6ec4ed502de7d94ff726bce13fe61 (diff)
parent2026a119512a9cced2957221e83fef92b8211d26 (diff)
Merge branch 'master' of git://git.denx.de/u-boot-arm
* 'master' of git://git.denx.de/u-boot-arm: Arm: re-introduce the MACH_TYPE_XXXXXX for EB_CPUX9K2 board arm: jadecpu: Readd MACH_TYPE_JADECPU at91: defined mach-types for otc570 board in board config file at91: defined mach-types for meesc board in board config file mx31pdk: Enable D and I caches ehci-mxc: remove incorrect comment README: Fix supported i.MX SoC list for CONFIG_MXC_SPI mx53: Turn off child clocks before reconfigure perclk_root qong: enable support for compressed images imx: imx31_phycore.h: fix checkpatch warnings vision2: Remove unused get_board_rev function mx53smd: Remove unused get_board_rev function mx53ard: Remove unused get_board_rev function mx53evk: Remove unused get_board_rev function mx53evk: Add RTC support mx53loco: Remove unused get_board_rev function mx53evk: Remove unneeded '1' from mx53evk.h OMAP3: mvblx: Initial support for mvBlueLYNX-X ARM: dig297: Define MACH_TYPE_OMAP3_CPS and CONFIG_MACH_TYPE omap3: mem: Move comments next to definitions omap3: mem: Clean-up whitespaces omap3: mem: Define and use common macros Davinci: ea20: added PREBOOT to configuration Davinci: ea20: added I2C support Davinci: ea20: added video support VIDEO: davinci: add framebuffer to da8xx ARM: Davinci: added missing registers to hardware.h Davinci: ea20: add gpios for LCD backlight control Davinci: ea20: add gpio for keeping power on in board_late_init Davinci: ea20: Add default U-Boot environment Davinci: ea20: Add early init to get early output from console Davinci: ea20: Add NAND support Davinci: ea20: set GPIOs to hold MII-Phy in reset and set UART0-Switch for console Davinci: ea20: set console on UART0 arm, davinci: add cam_enc_4xx support arm926ejs, davinci: add missing spi defines for dm365 arm926ejs, davinci: add cpuinfo for dm365 arm, davinci: add lowlevel function for dm365 soc arm, davinci: add header files for dm365 spl, nand: add 4bit HW ecc oob first nand_read_page function arm, davinci: add support for new spl framework spl: add option for adding post memory test to the SPL framework net, davinci_emac: make clock divider in MDIO control register configurable arm, usb, davinci: make USBPHY_CTL register configurable usb, davinci: add enable_vbus() weak function omap3evm: fix errors caused by multiple definitions omap3evm: Add (quick) configuration for NAND only omap3evm: Add (quick) configuration for MMC/SD only omap3evm: move common config options to new file omap3evm: Prepare to split configuration omap3evm: Reorder related config options omap/spl: actually enable the console davinci_emac: compilation fix, phy is array now omap3evm: Set environment variable 'ethaddr' arm, arm926: fix missing symbols in NAND_SPL mode arm, davinci: Add function lpsc_syncreset() arm, davinci: replace CONFIG_PRELOADER with CONFIG_SPL_BUILD arm/km: portl2 environment address update to P1B arm/km: adapt bootcounter evaluation arm/km: enable jffs2 cmds arm/km: trigger reconfiguration for the Xilinx FPGA arm/km: add boardid and hwkey to kernel command line ARM: Reintroduce MACH_TYPE_KM_KIRKWOOD for keymile ARM boards netspace_v2: enable I2C EEPROM support netspace_v2: fix SDRAM configuration armada100: define CONFIG_SYS_CACHELINE_SIZE pantheon: define CONFIG_SYS_CACHELINE_SIZE kirkwood: define CONFIG_SYS_CACHELINE_SIZE kirkwood: drop empty asm-offsets.s file arm/km/mgcoge3un: enhance "waitforne" feature arm/km: add variable waitforne to mgcoge3un gplugD: Fix for error:MACH_TYPE_SHEEVAD undeclared ARM: dreamplug: fix compilation ARM: DockStar: fix compilation ARM: netspace_v2: fix warnings am335x: Drop board_sysinfo struct am335x: Temporarily add MACH_TYPE define misc:pmic:samsung Enable PMIC driver at C210 Universal target dcache:s5p CONFIG_SYS_CACHELINE_SIZE added for s5p UNIVERSAL C210 target dcache:s5p CONFIG_SYS_CACHELINE_SIZE added for s5p GONI target smdkv310: use macro for mmc data read function address smdkv310: use spl framework for mmc spl SMDKV310: use get_ram_size() to validate dram size SMDKV310: Initialize board id using CONFIG_MACH_TYPE ORIGEN : use absolute paths and fix tool naming ORIGEN : enable device tree support MX25: tx25: Fix building due to missing MACH_TYPE mx31: Add board support for HALE TT-01 mx31: add ESD control registers mx31: define pins and init for UART2 and CSPI3 MX35: add support for flea3 board MX51: vision2: add MACH_TYPE in config file vision2: Remove unused header file mx51evk: Remove unused get_board_rev function mx51evk: Remove unneeded '1' from mx51evk.h I2C: Fix mxc_i2c.c problem on imx31_phycore mx35pdk: Add RTC support mx51evk: Use GPIO API for configuring the IOMUX mx51evk: Add RTC support rtc: Make mc13783-rtc driver generic qong: remove unneeded IOMUX settings qong: Use mx31_set_gpr to setup USBH2 pins mx31: Introduce mx31_set_gpr function mx31pdk: Add MC13783 PMIC support qong: remove unneeded "1" from qong.h misc: pmic: fix regression in pmic_fsl.c (SPI) mx5 configs: CONFIG_PRIME should really be CONFIG_ETHPRIME MX35: Drop unnecessary prototypes from imx-regs.h I2C: added I2C-2 and I2C-3 to MX35 MX35: factorize common assembly code MX35: add reset cause as provided by other i.MX MX35: add pins definition for UART3 MX35: added ESDC structure to imx-regs
Diffstat (limited to 'arch/arm/include/asm/arch-davinci/psc_defs.h')
-rw-r--r--arch/arm/include/asm/arch-davinci/psc_defs.h86
1 files changed, 86 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch-davinci/psc_defs.h b/arch/arm/include/asm/arch-davinci/psc_defs.h
new file mode 100644
index 0000000000..084b015738
--- /dev/null
+++ b/arch/arm/include/asm/arch-davinci/psc_defs.h
@@ -0,0 +1,86 @@
+/*
+ * Copyright (C) 2011
+ * Heiko Schocher, DENX Software Engineering, hs@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+#ifndef _DV_PSC_DEFS_H_
+#define _DV_PSC_DEFS_H_
+
+/*
+ * Power/Sleep Ctrl Register structure
+ * See sprufb3.pdf, Chapter 7
+ */
+struct dv_psc_regs {
+ unsigned int pid; /* 0x000 */
+ unsigned char rsvd0[16]; /* 0x004 */
+ unsigned char rsvd1[4]; /* 0x014 */
+ unsigned int inteval; /* 0x018 */
+ unsigned char rsvd2[36]; /* 0x01C */
+ unsigned int merrpr0; /* 0x040 */
+ unsigned int merrpr1; /* 0x044 */
+ unsigned char rsvd3[8]; /* 0x048 */
+ unsigned int merrcr0; /* 0x050 */
+ unsigned int merrcr1; /* 0x054 */
+ unsigned char rsvd4[8]; /* 0x058 */
+ unsigned int perrpr; /* 0x060 */
+ unsigned char rsvd5[4]; /* 0x064 */
+ unsigned int perrcr; /* 0x068 */
+ unsigned char rsvd6[4]; /* 0x06C */
+ unsigned int epcpr; /* 0x070 */
+ unsigned char rsvd7[4]; /* 0x074 */
+ unsigned int epccr; /* 0x078 */
+ unsigned char rsvd8[144]; /* 0x07C */
+ unsigned char rsvd9[20]; /* 0x10C */
+ unsigned int ptcmd; /* 0x120 */
+ unsigned char rsvd10[4]; /* 0x124 */
+ unsigned int ptstat; /* 0x128 */
+ unsigned char rsvd11[212]; /* 0x12C */
+ unsigned int pdstat0; /* 0x200 */
+ unsigned int pdstat1; /* 0x204 */
+ unsigned char rsvd12[248]; /* 0x208 */
+ unsigned int pdctl0; /* 0x300 */
+ unsigned int pdctl1; /* 0x304 */
+ unsigned char rsvd13[536]; /* 0x308 */
+ unsigned int mckout0; /* 0x520 */
+ unsigned int mckout1; /* 0x524 */
+ unsigned char rsvd14[728]; /* 0x528 */
+ unsigned int mdstat[52]; /* 0x800 */
+ unsigned char rsvd15[304]; /* 0x8D0 */
+ unsigned int mdctl[52]; /* 0xA00 */
+};
+
+/* PSC constants */
+#define EMURSTIE_MASK (0x00000200)
+
+#define PD0 (0)
+
+#define PSC_ENABLE (0x3)
+#define PSC_DISABLE (0x2)
+#define PSC_SYNCRESET (0x1)
+#define PSC_SWRSTDISABLE (0x0)
+
+#define PSC_GOSTAT (1 << 0)
+#define PSC_MD_STATE_MSK (0x1f)
+
+#define PSC_CMD_GO (1 << 0)
+
+#define dv_psc_regs ((struct dv_psc_regs *)DAVINCI_PWR_SLEEP_CNTRL_BASE)
+
+#endif /* _DV_PSC_DEFS_H_ */