diff options
| author | Vivek Gautam <gautam.vivek@samsung.com> | 2013-09-14 14:02:46 +0530 |
|---|---|---|
| committer | Marek Vasut <marex@denx.de> | 2013-10-20 23:42:38 +0200 |
| commit | 13194f3b5f51d104bdfdd7ff5a7556136b6dc35c (patch) | |
| tree | 7bd254220fb19ac57ae9207e870e3f3c0d9a6f39 /arch/arm/include/asm/arch-exynos/cpu.h | |
| parent | 5853e1335cfc76c230cc28c4226b4d513ddb7542 (diff) | |
USB: XHCI: Add xHCI host controller support for Exynos5
This adds driver layer for xHCI controller in Samsung's
exynos5 soc. This interacts with xHCI host controller stack.
Signed-off-by: Vikas C Sajjan <vikas.sajjan@samsung.com>
Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com>
Cc: Julius Werner <jwerner@chromium.org>
Cc: Simon Glass <sjg@chromium.org>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Cc: Dan Murphy <dmurphy@ti.com>
Cc: Marek Vasut <marex@denx.de>
Diffstat (limited to 'arch/arm/include/asm/arch-exynos/cpu.h')
| -rw-r--r-- | arch/arm/include/asm/arch-exynos/cpu.h | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch-exynos/cpu.h b/arch/arm/include/asm/arch-exynos/cpu.h index 4b67191c07..b4ef03e8a1 100644 --- a/arch/arm/include/asm/arch-exynos/cpu.h +++ b/arch/arm/include/asm/arch-exynos/cpu.h @@ -51,6 +51,8 @@ #define EXYNOS4_ACE_SFR_BASE DEVICE_NOT_AVAILABLE #define EXYNOS4_DMC_PHY_BASE DEVICE_NOT_AVAILABLE #define EXYNOS4_AUDIOSS_BASE DEVICE_NOT_AVAILABLE +#define EXYNOS4_USB_HOST_XHCI_BASE DEVICE_NOT_AVAILABLE +#define EXYNOS4_USB3PHY_BASE DEVICE_NOT_AVAILABLE /* EXYNOS4X12 */ #define EXYNOS4X12_GPIO_PART3_BASE 0x03860000 @@ -87,6 +89,8 @@ #define EXYNOS4X12_ACE_SFR_BASE DEVICE_NOT_AVAILABLE #define EXYNOS4X12_DMC_PHY_BASE DEVICE_NOT_AVAILABLE #define EXYNOS4X12_AUDIOSS_BASE DEVICE_NOT_AVAILABLE +#define EXYNOS4X12_USB_HOST_XHCI_BASE DEVICE_NOT_AVAILABLE +#define EXYNOS4X12_USB3PHY_BASE DEVICE_NOT_AVAILABLE /* EXYNOS5 Common*/ #define EXYNOS5_I2C_SPACING 0x10000 @@ -106,6 +110,8 @@ #define EXYNOS5_DMC_CTRL_BASE 0x10DD0000 #define EXYNOS5_GPIO_PART1_BASE 0x11400000 #define EXYNOS5_MIPI_DSIM_BASE 0x11D00000 +#define EXYNOS5_USB_HOST_XHCI_BASE 0x12000000 +#define EXYNOS5_USB3PHY_BASE 0x12100000 #define EXYNOS5_USB_HOST_EHCI_BASE 0x12110000 #define EXYNOS5_USBPHY_BASE 0x12130000 #define EXYNOS5_USBOTG_BASE 0x12140000 @@ -220,7 +226,9 @@ SAMSUNG_BASE(swreset, SWRESET) SAMSUNG_BASE(timer, PWMTIMER_BASE) SAMSUNG_BASE(uart, UART_BASE) SAMSUNG_BASE(usb_phy, USBPHY_BASE) +SAMSUNG_BASE(usb3_phy, USB3PHY_BASE) SAMSUNG_BASE(usb_ehci, USB_HOST_EHCI_BASE) +SAMSUNG_BASE(usb_xhci, USB_HOST_XHCI_BASE) SAMSUNG_BASE(usb_otg, USBOTG_BASE) SAMSUNG_BASE(watchdog, WATCHDOG_BASE) SAMSUNG_BASE(power, POWER_BASE) |