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| author | Albert ARIBAUD <albert.u.boot@aribaud.net> | 2013-06-19 12:53:59 +0200 |
|---|---|---|
| committer | Albert ARIBAUD <albert.u.boot@aribaud.net> | 2013-06-19 12:53:59 +0200 |
| commit | 69f14dc2fd64307f012381dd333a06001dec75dc (patch) | |
| tree | 1c520dfb9afd8406230a5382ebaf57b0b8cd6c5d /arch/arm/include/asm/arch-exynos/tzpc.h | |
| parent | 847e6693ccb529bf8346db62876f38f0c4e04ade (diff) | |
| parent | ed7bdc03eb516fb698ccc12ec5b4b9f132d05c5f (diff) | |
Merge branch 'u-boot-samsung/master' into 'u-boot-arm/master'
Conflicts:
spl/Makefile
Diffstat (limited to 'arch/arm/include/asm/arch-exynos/tzpc.h')
| -rw-r--r-- | arch/arm/include/asm/arch-exynos/tzpc.h | 20 |
1 files changed, 20 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch-exynos/tzpc.h b/arch/arm/include/asm/arch-exynos/tzpc.h index c5eb4b1cc2..4d9c3a32fb 100644 --- a/arch/arm/include/asm/arch-exynos/tzpc.h +++ b/arch/arm/include/asm/arch-exynos/tzpc.h @@ -47,6 +47,26 @@ struct exynos_tzpc { unsigned int pcellid2; unsigned int pcellid3; }; + +#define EXYNOS4_NR_TZPC_BANKS 6 +#define EXYNOS5_NR_TZPC_BANKS 10 + +/* TZPC : Register Offsets */ +#define TZPC_BASE_OFFSET 0x10000 + +/* + * TZPC Register Value : + * R0SIZE: 0x0 : Size of secured ram + */ +#define R0SIZE 0x0 + +/* + * TZPC Decode Protection Register Value : + * DECPROTXSET: 0xFF : Set Decode region to non-secure + */ +#define DECPROTXSET 0xFF +void tzpc_init(void); + #endif #endif |