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authorYork Sun <york.sun@nxp.com>2016-10-04 14:45:01 -0700
committerYork Sun <york.sun@nxp.com>2016-10-06 09:59:10 -0700
commitb4b60d06c6f902cdd80236717375d03267dd949a (patch)
tree41a1c6b6c2cae31acbce0f18a92f966c69b4dbe5 /arch/arm/include/asm/arch-fsl-layerscape/config.h
parentfb2bf8c2c6c5e80a941987d7c8abcf47c825f942 (diff)
arm: Move MAX_CPUS to Kconfig
Move MAX_CPUS option to Kconfig and clean up existing uses for ARM. This option is used by Freescale Layerscape SoCs. Signed-off-by: York Sun <york.sun@nxp.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'arch/arm/include/asm/arch-fsl-layerscape/config.h')
-rw-r--r--arch/arm/include/asm/arch-fsl-layerscape/config.h4
1 files changed, 0 insertions, 4 deletions
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/config.h b/arch/arm/include/asm/arch-fsl-layerscape/config.h
index a5c6c4cd26..572fa94693 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/config.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/config.h
@@ -30,7 +30,6 @@
#define CONFIG_SYS_MEM_RESERVE_SECURE (2048 * 1024) /* 2MB */
#ifdef CONFIG_LS2080A
-#define CONFIG_MAX_CPUS 16
#define CONFIG_SYS_FSL_IFC_BANK_COUNT 8
#define CONFIG_NUM_DDR_CONTROLLERS 3
#define CONFIG_SYS_FSL_HAS_DP_DDR /* Runtime check to confirm */
@@ -171,7 +170,6 @@
/* SoC related */
#ifdef CONFIG_LS1043A
-#define CONFIG_MAX_CPUS 4
#define CONFIG_SYS_FMAN_V3
#define CONFIG_SYS_NUM_FMAN 1
#define CONFIG_SYS_NUM_FM1_DTSEC 7
@@ -206,13 +204,11 @@
#define CONFIG_SYS_FSL_ERRATUM_A009660
#define CONFIG_SYS_FSL_MAX_NUM_OF_SEC 1
#elif defined(CONFIG_ARCH_LS1012A)
-#define CONFIG_MAX_CPUS 1
#undef CONFIG_SYS_FSL_DDRC_ARM_GEN3
#define GICD_BASE 0x01401000
#define GICC_BASE 0x01402000
#elif defined(CONFIG_ARCH_LS1046A)
-#define CONFIG_MAX_CPUS 4
#define CONFIG_SYS_FMAN_V3
#define CONFIG_SYS_NUM_FMAN 1
#define CONFIG_SYS_NUM_FM1_DTSEC 8