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authorVinitha Pillai-B57223 <vinitha.pillai@nxp.com>2017-03-23 13:48:19 +0530
committerYork Sun <york.sun@nxp.com>2017-04-17 09:03:30 -0700
commitd2a99502ade1a85dd75a1709ea5808bc5e7ee21f (patch)
tree722f4ea5b056890cd4604614aa73b24f43d311d2 /arch/arm/include/asm/arch-fsl-layerscape/config.h
parentf7244f2c4815aa80a7cd7e9ceaee1969a16acd47 (diff)
armv8: SECURE_BOOT: Enable chain of trust on LS1012A platform
Define bootscript and its header addresses for QSPI target Also add PPA header address in Kconfig Signed-off-by: Vinitha Pillai <vinitha.pillai@nxp.com> Signed-off-by: Sumit Garg <sumit.garg@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
Diffstat (limited to 'arch/arm/include/asm/arch-fsl-layerscape/config.h')
-rw-r--r--arch/arm/include/asm/arch-fsl-layerscape/config.h7
1 files changed, 6 insertions, 1 deletions
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/config.h b/arch/arm/include/asm/arch-fsl-layerscape/config.h
index 1f22afd9e6..4db11b646e 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/config.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/config.h
@@ -185,7 +185,12 @@
#elif defined(CONFIG_ARCH_LS1012A)
#define GICD_BASE 0x01401000
#define GICC_BASE 0x01402000
-
+#define CONFIG_SYS_FSL_SFP_VER_3_2
+#define CONFIG_SYS_FSL_SEC_MON_BE
+#define CONFIG_SYS_FSL_SFP_BE
+#define CONFIG_SYS_FSL_SRK_LE
+#define CONFIG_KEY_REVOCATION
+#define CONFIG_SYS_FSL_MAX_NUM_OF_SEC 1
#define CONFIG_SYS_DDR_BLOCK1_SIZE ((phys_size_t)2 << 30)
#define CONFIG_MAX_MEM_MAPPED CONFIG_SYS_DDR_BLOCK1_SIZE