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authorBharat Bhushan <bharat.bhushan@nxp.com>2017-03-22 12:06:27 +0530
committerYork Sun <york.sun@nxp.com>2017-03-28 10:47:16 -0700
commit5344c7b7833dbaad7fe468e38b5b0e98ced6d888 (patch)
treed309ccf02d6eda7c1f5984d1bd8563492c083815 /arch/arm/include/asm/arch-fsl-layerscape
parenta4954f9467fd720fc386ada6ec43833a85078cce (diff)
arvm8: pcie-layerscape: Define stream-ids for Layerscape Chassis-2
Layerscape Chassis-2 have PCIe device, some platform devices and DPAA1 devices which will use stream-ids for iommu level isolation as they are behind SMMU. This patch defines the stream-ids for Chassis-2 devices. DPAA1 is reserved for future use. Signed-off-by: Bharat Bhushan <Bharat.Bhushan@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
Diffstat (limited to 'arch/arm/include/asm/arch-fsl-layerscape')
-rw-r--r--arch/arm/include/asm/arch-fsl-layerscape/stream_id_lsch2.h63
1 files changed, 63 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/stream_id_lsch2.h b/arch/arm/include/asm/arch-fsl-layerscape/stream_id_lsch2.h
new file mode 100644
index 0000000000..b326fe5c40
--- /dev/null
+++ b/arch/arm/include/asm/arch-fsl-layerscape/stream_id_lsch2.h
@@ -0,0 +1,63 @@
+/*
+ * Copyright 2017 NXP Semiconductor, Inc.
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ *
+ */
+#ifndef __FSL_STREAM_ID_H
+#define __FSL_STREAM_ID_H
+
+/*
+ * Stream IDs on Chassis-2 (for example ls1043a, ls1046a, ls1012) devices
+ * are not hardwired and are programmed by sw. There are a limited number
+ * of stream IDs available, and the partitioning of them is scenario
+ * dependent. This header defines the partitioning between legacy, PCI,
+ * and DPAA1 devices.
+ *
+ * This partitioning can be customized in this file depending
+ * on the specific hardware config:
+ *
+ * -non-PCI legacy, platform devices (USB, SDHC, SATA, DMA, QE etc)
+ * -all legacy devices get a unique stream ID assigned and programmed in
+ * their AMQR registers by u-boot
+ *
+ * -PCIe
+ * -there is a range of stream IDs set aside for PCI in this
+ * file. U-boot will scan the PCI bus and for each device discovered:
+ * -allocate a streamID
+ * -set a PEXn LUT table entry mapping 'requester ID' to 'stream ID'
+ * -set a msi-map entry in the PEXn controller node in the
+ * device tree (see Documentation/devicetree/bindings/pci/pci-msi.txt
+ * for more info on the msi-map definition)
+ * -set a iommu-map entry in the PEXn controller node in the
+ * device tree (see Documentation/devicetree/bindings/pci/pci-iommu.txt
+ * for more info on the iommu-map definition)
+ *
+ * -DPAA1
+ * - Stream ids for DPAA1 use are reserved for future usecase.
+ *
+ */
+
+
+#define FSL_INVALID_STREAM_ID 0
+
+/* legacy devices */
+#define FSL_USB1_STREAM_ID 1
+#define FSL_USB2_STREAM_ID 2
+#define FSL_USB3_STREAM_ID 3
+#define FSL_SDHC_STREAM_ID 4
+#define FSL_SATA_STREAM_ID 5
+#define FSL_QE_STREAM_ID 6
+#define FSL_QDMA_STREAM_ID 7
+#define FSL_EDMA_STREAM_ID 8
+#define FSL_ETR_STREAM_ID 9
+
+/* PCI - programmed in PEXn_LUT */
+#define FSL_PEX_STREAM_ID_START 11
+#define FSL_PEX_STREAM_ID_END 26
+
+/* DPAA1 - Stream-ID that can be programmed in DPAA1 h/w */
+#define FSL_DPAA1_STREAM_ID_START 27
+#define FSL_DPAA1_STREAM_ID_END 63
+
+#endif