diff options
author | Tom Rini <trini@konsulko.com> | 2018-01-11 11:18:49 -0500 |
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committer | Tom Rini <trini@konsulko.com> | 2018-01-11 11:18:49 -0500 |
commit | 6bf634223ab6bd58a3e76cf84a9a204a4408a251 (patch) | |
tree | a1fdcff7682cd8f82a7605e35837e754d4dbae7f /arch/arm/include/asm/arch-fsl-layerscape | |
parent | 2ff1da9453030e02c1e750bd847c9b4dffb8f4a8 (diff) | |
parent | 1cabeb88ebbae0e5d418333cdd2526b06b397c91 (diff) |
Merge git://git.denx.de/u-boot-fsl-qoriq
Diffstat (limited to 'arch/arm/include/asm/arch-fsl-layerscape')
-rw-r--r-- | arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h | 29 | ||||
-rw-r--r-- | arch/arm/include/asm/arch-fsl-layerscape/soc.h | 2 | ||||
-rw-r--r-- | arch/arm/include/asm/arch-fsl-layerscape/speed.h | 3 |
3 files changed, 34 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h index 2561ead7c3..1ff5cac344 100644 --- a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h +++ b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h @@ -23,6 +23,8 @@ #define CONFIG_SYS_FSL_GUTS_ADDR (CONFIG_SYS_IMMR + 0x00ee0000) #define CONFIG_SYS_FSL_RST_ADDR (CONFIG_SYS_IMMR + 0x00ee00b0) #define CONFIG_SYS_FSL_SCFG_ADDR (CONFIG_SYS_IMMR + 0x00570000) +#define CONFIG_SYS_FSL_BMAN_ADDR (CONFIG_SYS_IMMR + 0x00890000) +#define CONFIG_SYS_FSL_QMAN_ADDR (CONFIG_SYS_IMMR + 0x00880000) #define CONFIG_SYS_FSL_FMAN_ADDR (CONFIG_SYS_IMMR + 0x00a00000) #define CONFIG_SYS_FSL_SERDES_ADDR (CONFIG_SYS_IMMR + 0x00ea0000) #define CONFIG_SYS_FSL_DCFG_ADDR (CONFIG_SYS_IMMR + 0x00ee0000) @@ -41,6 +43,33 @@ #define CONFIG_SYS_SEC_MON_ADDR (CONFIG_SYS_IMMR + 0xe90000) #define CONFIG_SYS_SFP_ADDR (CONFIG_SYS_IMMR + 0xe80200) +#define CONFIG_SYS_BMAN_NUM_PORTALS 10 +#define CONFIG_SYS_BMAN_MEM_BASE 0x508000000 +#define CONFIG_SYS_BMAN_MEM_PHYS (0xf00000000ull + \ + CONFIG_SYS_BMAN_MEM_BASE) +#define CONFIG_SYS_BMAN_MEM_SIZE 0x08000000 +#define CONFIG_SYS_BMAN_SP_CENA_SIZE 0x10000 +#define CONFIG_SYS_BMAN_SP_CINH_SIZE 0x10000 +#define CONFIG_SYS_BMAN_CENA_BASE CONFIG_SYS_BMAN_MEM_BASE +#define CONFIG_SYS_BMAN_CENA_SIZE (CONFIG_SYS_BMAN_MEM_SIZE >> 1) +#define CONFIG_SYS_BMAN_CINH_BASE (CONFIG_SYS_BMAN_MEM_BASE + \ + CONFIG_SYS_BMAN_CENA_SIZE) +#define CONFIG_SYS_BMAN_CINH_SIZE (CONFIG_SYS_BMAN_MEM_SIZE >> 1) +#define CONFIG_SYS_BMAN_SWP_ISDR_REG 0x3E80 +#define CONFIG_SYS_QMAN_NUM_PORTALS 10 +#define CONFIG_SYS_QMAN_MEM_BASE 0x500000000 +#define CONFIG_SYS_QMAN_MEM_PHYS (0xf00000000ull + \ + CONFIG_SYS_QMAN_MEM_BASE) +#define CONFIG_SYS_QMAN_MEM_SIZE 0x08000000 +#define CONFIG_SYS_QMAN_SP_CENA_SIZE 0x10000 +#define CONFIG_SYS_QMAN_SP_CINH_SIZE 0x10000 +#define CONFIG_SYS_QMAN_CENA_BASE CONFIG_SYS_QMAN_MEM_BASE +#define CONFIG_SYS_QMAN_CENA_SIZE (CONFIG_SYS_QMAN_MEM_SIZE >> 1) +#define CONFIG_SYS_QMAN_CINH_BASE (CONFIG_SYS_QMAN_MEM_BASE + \ + CONFIG_SYS_QMAN_CENA_SIZE) +#define CONFIG_SYS_QMAN_CINH_SIZE (CONFIG_SYS_QMAN_MEM_SIZE >> 1) +#define CONFIG_SYS_QMAN_SWP_ISDR_REG 0x3680 + #define CONFIG_SYS_FSL_TIMER_ADDR 0x02b00000 #define I2C1_BASE_ADDR (CONFIG_SYS_IMMR + 0x01180000) diff --git a/arch/arm/include/asm/arch-fsl-layerscape/soc.h b/arch/arm/include/asm/arch-fsl-layerscape/soc.h index 09f64e7bd7..1e65e4e114 100644 --- a/arch/arm/include/asm/arch-fsl-layerscape/soc.h +++ b/arch/arm/include/asm/arch-fsl-layerscape/soc.h @@ -88,6 +88,8 @@ struct cpu_type { /* ahci port register default value */ #define AHCI_PORT_PHY_1_CFG 0xa003fffe +#define AHCI_PORT_PHY2_CFG 0x28184d1f +#define AHCI_PORT_PHY3_CFG 0x0e081509 #define AHCI_PORT_TRANS_CFG 0x08000029 #define AHCI_PORT_AXICC_CFG 0x3fffffff diff --git a/arch/arm/include/asm/arch-fsl-layerscape/speed.h b/arch/arm/include/asm/arch-fsl-layerscape/speed.h index de795f6056..e94fe8e254 100644 --- a/arch/arm/include/asm/arch-fsl-layerscape/speed.h +++ b/arch/arm/include/asm/arch-fsl-layerscape/speed.h @@ -7,4 +7,7 @@ #ifndef _FSL_LAYERSCAPE_SPEED_H #define _FSL_LAYERSCAPE_SPEED_H void get_sys_info(struct sys_info *sys_info); +#ifdef CONFIG_SYS_DPAA_QBMAN +unsigned long get_qman_freq(void); +#endif #endif /* _FSL_LAYERSCAPE_SPEED_H */ |