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| author | York Sun <yorksun@freescale.com> | 2014-06-23 15:36:44 -0700 |
|---|---|---|
| committer | York Sun <yorksun@freescale.com> | 2014-07-22 16:25:54 -0700 |
| commit | 8340e7ac86ad3c59956e8f0bd627b741e5209439 (patch) | |
| tree | 0460d0395f63b1cee89ae8dfe5479ace02bb5c50 /arch/arm/include/asm/arch-fsl-lsch3/config.h | |
| parent | 6666017f44e39ec0385e3c7736b8c9af46cf4f08 (diff) | |
driver/ddr: Fix DDR4 driver for ARM
Previously the driver was only tested on Power SoCs. Different barrier
instructions are needed for ARM SoCs.
Signed-off-by: York Sun <yorksun@freescale.com>
Diffstat (limited to 'arch/arm/include/asm/arch-fsl-lsch3/config.h')
| -rw-r--r-- | arch/arm/include/asm/arch-fsl-lsch3/config.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch-fsl-lsch3/config.h b/arch/arm/include/asm/arch-fsl-lsch3/config.h index c1c718ecd4..b17410a58a 100644 --- a/arch/arm/include/asm/arch-fsl-lsch3/config.h +++ b/arch/arm/include/asm/arch-fsl-lsch3/config.h @@ -43,7 +43,11 @@ /* DDR */ #define CONFIG_SYS_FSL_DDR_LE #define CONFIG_VERY_BIG_RAM +#ifdef CONFIG_SYS_FSL_DDR4 +#define CONFIG_SYS_FSL_DDRC_GEN4 +#else #define CONFIG_SYS_FSL_DDRC_ARM_GEN3 /* Enable Freescale ARM DDR3 driver */ +#endif #define CONFIG_SYS_FSL_DDR /* Freescale DDR driver */ #define CONFIG_SYS_LS2_DDR_BLOCK1_SIZE ((phys_size_t)2 << 30) #define CONFIG_MAX_MEM_MAPPED CONFIG_SYS_LS2_DDR_BLOCK1_SIZE |