summaryrefslogtreecommitdiff
path: root/arch/arm/include/asm/arch-keystone
diff options
context:
space:
mode:
authorHao Zhang <hzhang@ti.com>2014-07-16 00:59:24 +0300
committerTom Rini <trini@ti.com>2014-07-25 16:26:11 -0400
commit20187fd11c37226fac8661bbac96ddd4fdf507b1 (patch)
treea44f40207f8bc097ac8a3af82f1db40ea9b6ce14 /arch/arm/include/asm/arch-keystone
parent4dca7f0acc88708100a2b25b019befc9eea02f45 (diff)
ARM: keystone2: add MSMC cache coherency support for K2E SOC
This patch adds Keystone2 K2E SOC specific code to support MSMC cache coherency. Also create header file for msmc to hold its API. Acked-by: Murali Karicheri <m-karicheri2@ti.com> Signed-off-by: Hao Zhang <hzhang@ti.com> Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
Diffstat (limited to 'arch/arm/include/asm/arch-keystone')
-rw-r--r--arch/arm/include/asm/arch-keystone/hardware.h1
-rw-r--r--arch/arm/include/asm/arch-keystone/msmc.h17
2 files changed, 17 insertions, 1 deletions
diff --git a/arch/arm/include/asm/arch-keystone/hardware.h b/arch/arm/include/asm/arch-keystone/hardware.h
index 9c86b695b4..bcfb5517ea 100644
--- a/arch/arm/include/asm/arch-keystone/hardware.h
+++ b/arch/arm/include/asm/arch-keystone/hardware.h
@@ -180,7 +180,6 @@ static inline int cpu_revision(void)
return rev;
}
-void share_all_segments(int priv_id);
int cpu_to_bus(u32 *ptr, u32 length);
void sdelay(unsigned long);
diff --git a/arch/arm/include/asm/arch-keystone/msmc.h b/arch/arm/include/asm/arch-keystone/msmc.h
new file mode 100644
index 0000000000..c320db5b65
--- /dev/null
+++ b/arch/arm/include/asm/arch-keystone/msmc.h
@@ -0,0 +1,17 @@
+/*
+ * MSMC controller
+ *
+ * (C) Copyright 2014
+ * Texas Instruments Incorporated, <www.ti.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef _MSMC_H_
+#define _MSMC_H_
+
+#include <asm/arch/hardware.h>
+
+void msmc_share_all_segments(int priv_id);
+
+#endif