ARM: keystone: clock: move K2HK SoC dependent code in separate file

This patch in general spit SoC type clock dependent code and general
clock code. Before adding keystone II Edison k2e SoC which has
slightly different dpll set, move k2hk dependent clock code to
separate clock-k2hk.c file.

Acked-by: Murali Karicheri <m-karicheri2@ti.com>
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>

2 files changed, 28 insertions, 21 deletions

diff --git a/arch/arm/include/asm/arch-keystone/clock-k2hk.h b/arch/arm/include/asm/arch-keystone/clock-k2hk.h
index ed1225c298..784a0be567 100644
--- a/arch/arm/include/asm/arch-keystone/clock-k2hk.h
+++ b/arch/arm/include/asm/arch-keystone/clock-k2hk.h
@@ -10,10 +10,6 @@
 #ifndef __ASM_ARCH_CLOCK_K2HK_H
 #define __ASM_ARCH_CLOCK_K2HK_H
 
-#include <asm/arch/hardware.h>
-
-#ifndef __ASSEMBLY__
-
 enum ext_clk_e {
 	sys_clk,
 	alt_core_clk,
@@ -66,15 +62,6 @@ enum pll_type_e {
 	DDR3A_PLL,
 	DDR3B_PLL,
 };
-#define MAIN_PLL CORE_PLL
-
-/* PLL configuration data */
-struct pll_init_data {
-	int pll;
-	int pll_m;		/* PLL Multiplier */
-	int pll_d;		/* PLL divider */
-	int pll_od;		/* PLL output divider    */
-};
 
 #define CORE_PLL_799    {CORE_PLL,	13,	1,	2}
 #define CORE_PLL_983    {CORE_PLL,	16,	1,	2}
@@ -98,12 +85,4 @@ struct pll_init_data {
 #define DDR3_PLL_800(x)	{DDR3##x##_PLL,	16,	1,	2}
 #define DDR3_PLL_333(x)	{DDR3##x##_PLL,	20,	1,	6}
 
-void init_plls(int num_pll, struct pll_init_data *config);
-void init_pll(const struct pll_init_data *data);
-unsigned long clk_get_rate(unsigned int clk);
-unsigned long clk_round_rate(unsigned int clk, unsigned long hz);
-int clk_set_rate(unsigned int clk, unsigned long hz);
-
-#endif
-
 #endif
diff --git a/arch/arm/include/asm/arch-keystone/clock.h b/arch/arm/include/asm/arch-keystone/clock.h
index 324501b75a..c7da3520c4 100644
--- a/arch/arm/include/asm/arch-keystone/clock.h
+++ b/arch/arm/include/asm/arch-keystone/clock.h
@@ -10,8 +10,36 @@
 #ifndef __ASM_ARCH_CLOCK_H
 #define __ASM_ARCH_CLOCK_H
 
+#ifndef __ASSEMBLY__
+
 #ifdef CONFIG_SOC_K2HK
 #include <asm/arch/clock-k2hk.h>
 #endif
 
+#define MAIN_PLL CORE_PLL
+
+#include <asm/types.h>
+
+struct keystone_pll_regs {
+	u32 reg0;
+	u32 reg1;
+};
+
+/* PLL configuration data */
+struct pll_init_data {
+	int pll;
+	int pll_m;		/* PLL Multiplier */
+	int pll_d;		/* PLL divider */
+	int pll_od;		/* PLL output divider */
+};
+
+extern const struct keystone_pll_regs keystone_pll_regs[];
+
+void init_plls(int num_pll, struct pll_init_data *config);
+void init_pll(const struct pll_init_data *data);
+unsigned long clk_get_rate(unsigned int clk);
+unsigned long clk_round_rate(unsigned int clk, unsigned long hz);
+int clk_set_rate(unsigned int clk, unsigned long hz);
+
+#endif
 #endif