diff options
author | trem <tremyfr@yahoo.fr> | 2012-08-25 05:30:33 +0000 |
---|---|---|
committer | Albert ARIBAUD <albert.u.boot@aribaud.net> | 2012-09-01 14:58:29 +0200 |
commit | e71c39def6a00ba3dee9a554ea85a8a5bd3dd300 (patch) | |
tree | d76a6985573e1593d9f35bd61918089a7f4e935d /arch/arm/include/asm/arch-mx27/gpio.h | |
parent | af369d98317fbbd85a5c7f9ed2c9fdf4cbec4b7f (diff) |
gpio: add gpio api support to mx27 (v4)
The gpio api has been tested on an armadeus apf27.
Signed-off-by: Philippe Reynes <tremyfr@yahoo.fr>
Acked-by: Stefano Babic <sbabic@denx.de>
Diffstat (limited to 'arch/arm/include/asm/arch-mx27/gpio.h')
-rw-r--r-- | arch/arm/include/asm/arch-mx27/gpio.h | 55 |
1 files changed, 55 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch-mx27/gpio.h b/arch/arm/include/asm/arch-mx27/gpio.h new file mode 100644 index 0000000000..4b4eb0d5c0 --- /dev/null +++ b/arch/arm/include/asm/arch-mx27/gpio.h @@ -0,0 +1,55 @@ +/* + * Copyright (C) 2012 + * Philippe Reynes <tremyfr@yahoo.fr> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + + +#ifndef __ASM_ARCH_MX27_GPIO_H +#define __ASM_ARCH_MX27_GPIO_H + +/* GPIO registers */ +struct gpio_regs { + u32 gpio_dir; /* DDIR */ + u32 ocr1; + u32 ocr2; + u32 iconfa1; + u32 iconfa2; + u32 iconfb1; + u32 iconfb2; + u32 gpio_dr; /* DR */ + u32 gius; + u32 gpio_psr; /* SSR */ + u32 icr1; + u32 icr2; + u32 imr; + u32 isr; + u32 gpr; + u32 swr; + u32 puen; + u32 res[0x2f]; +}; + +/* This structure is used by the function imx_gpio_mode */ +struct gpio_port_regs { + struct gpio_regs port[6]; +}; + +#endif |