Merge branch 'master' of git://git.denx.de/u-boot-arm

* 'master' of git://git.denx.de/u-boot-arm:
  Arm: re-introduce the MACH_TYPE_XXXXXX for EB_CPUX9K2 board
  arm: jadecpu: Readd MACH_TYPE_JADECPU
  at91: defined mach-types for otc570 board in board config file
  at91: defined mach-types for meesc board in board config file
  mx31pdk: Enable D and I caches
  ehci-mxc: remove incorrect comment
  README: Fix supported i.MX SoC list for CONFIG_MXC_SPI
  mx53: Turn off child clocks before reconfigure perclk_root
  qong: enable support for compressed images
  imx: imx31_phycore.h: fix checkpatch warnings
  vision2: Remove unused get_board_rev function
  mx53smd: Remove unused get_board_rev function
  mx53ard: Remove unused get_board_rev function
  mx53evk: Remove unused get_board_rev function
  mx53evk: Add RTC support
  mx53loco: Remove unused get_board_rev function
  mx53evk: Remove unneeded '1' from mx53evk.h
  OMAP3: mvblx: Initial support for mvBlueLYNX-X
  ARM: dig297: Define MACH_TYPE_OMAP3_CPS and CONFIG_MACH_TYPE
  omap3: mem: Move comments next to definitions
  omap3: mem: Clean-up whitespaces
  omap3: mem: Define and use common macros
  Davinci: ea20: added PREBOOT to configuration
  Davinci: ea20: added I2C support
  Davinci: ea20: added video support
  VIDEO: davinci: add framebuffer to da8xx
  ARM: Davinci: added missing registers to hardware.h
  Davinci: ea20: add gpios for LCD backlight control
  Davinci: ea20: add gpio for keeping power on in board_late_init
  Davinci: ea20: Add default U-Boot environment
  Davinci: ea20: Add early init to get early output from console
  Davinci: ea20: Add NAND support
  Davinci: ea20: set GPIOs to hold MII-Phy in reset and set UART0-Switch for console
  Davinci: ea20: set console on UART0
  arm, davinci: add cam_enc_4xx support
  arm926ejs, davinci: add missing spi defines for dm365
  arm926ejs, davinci: add cpuinfo for dm365
  arm, davinci: add lowlevel function for dm365 soc
  arm, davinci: add header files for dm365
  spl, nand: add 4bit HW ecc oob first nand_read_page function
  arm, davinci: add support for new spl framework
  spl: add option for adding post memory test to the SPL framework
  net, davinci_emac: make clock divider in MDIO control register configurable
  arm, usb, davinci: make USBPHY_CTL register configurable
  usb, davinci: add enable_vbus() weak function
  omap3evm: fix errors caused by multiple definitions
  omap3evm: Add (quick) configuration for NAND only
  omap3evm: Add (quick) configuration for MMC/SD only
  omap3evm: move common config options to new file
  omap3evm: Prepare to split configuration
  omap3evm: Reorder related config options
  omap/spl: actually enable the console
  davinci_emac: compilation fix, phy is array now
  omap3evm: Set environment variable 'ethaddr'
  arm, arm926: fix missing symbols in NAND_SPL mode
  arm, davinci: Add function lpsc_syncreset()
  arm, davinci: replace CONFIG_PRELOADER with CONFIG_SPL_BUILD
  arm/km: portl2 environment address update to P1B
  arm/km: adapt bootcounter evaluation
  arm/km: enable jffs2 cmds
  arm/km: trigger reconfiguration for the Xilinx FPGA
  arm/km: add boardid and hwkey to kernel command line
  ARM: Reintroduce MACH_TYPE_KM_KIRKWOOD for keymile ARM boards
  netspace_v2: enable I2C EEPROM support
  netspace_v2: fix SDRAM configuration
  armada100: define CONFIG_SYS_CACHELINE_SIZE
  pantheon: define CONFIG_SYS_CACHELINE_SIZE
  kirkwood: define CONFIG_SYS_CACHELINE_SIZE
  kirkwood: drop empty asm-offsets.s file
  arm/km/mgcoge3un: enhance "waitforne" feature
  arm/km: add variable waitforne to mgcoge3un
  gplugD: Fix for error:MACH_TYPE_SHEEVAD undeclared
  ARM: dreamplug: fix compilation
  ARM: DockStar: fix compilation
  ARM: netspace_v2: fix warnings
  am335x: Drop board_sysinfo struct
  am335x: Temporarily add MACH_TYPE define
  misc:pmic:samsung Enable PMIC driver at C210 Universal target
  dcache:s5p CONFIG_SYS_CACHELINE_SIZE added for s5p UNIVERSAL C210 target
  dcache:s5p CONFIG_SYS_CACHELINE_SIZE added for s5p GONI target
  smdkv310: use macro for mmc data read function address
  smdkv310: use spl framework for mmc spl
  SMDKV310: use get_ram_size() to validate dram size
  SMDKV310: Initialize board id using CONFIG_MACH_TYPE
  ORIGEN : use absolute paths and fix tool naming
  ORIGEN : enable device tree support
  MX25: tx25: Fix building due to missing MACH_TYPE
  mx31: Add board support for HALE TT-01
  mx31: add ESD control registers
  mx31: define pins and init for UART2 and CSPI3
  MX35: add support for flea3 board
  MX51: vision2: add MACH_TYPE in config file
  vision2: Remove unused header file
  mx51evk: Remove unused get_board_rev function
  mx51evk: Remove unneeded '1' from mx51evk.h
  I2C: Fix mxc_i2c.c problem on imx31_phycore
  mx35pdk: Add RTC support
  mx51evk: Use GPIO API for configuring the IOMUX
  mx51evk: Add RTC support
  rtc: Make mc13783-rtc driver generic
  qong: remove unneeded IOMUX settings
  qong: Use mx31_set_gpr to setup USBH2 pins
  mx31: Introduce mx31_set_gpr function
  mx31pdk: Add MC13783 PMIC support
  qong: remove unneeded "1" from qong.h
  misc: pmic: fix regression in pmic_fsl.c (SPI)
  mx5 configs: CONFIG_PRIME should really be CONFIG_ETHPRIME
  MX35: Drop unnecessary prototypes from imx-regs.h
  I2C: added I2C-2 and I2C-3 to MX35
  MX35: factorize common assembly code
  MX35: add reset cause as provided by other i.MX
  MX35: add pins definition for UART3
  MX35: added ESDC structure to imx-regs

2 files changed, 69 insertions, 0 deletions

diff --git a/arch/arm/include/asm/arch-mx31/clock.h b/arch/arm/include/asm/arch-mx31/clock.h
index 2e3bce2c31..253a0e1584 100644
--- a/arch/arm/include/asm/arch-mx31/clock.h
+++ b/arch/arm/include/asm/arch-mx31/clock.h
@@ -37,8 +37,10 @@ unsigned int mxc_get_clock(enum mxc_clock clk);
 extern u32 imx_get_uartclk(void);
 extern void mx31_gpio_mux(unsigned long mode);
 extern void mx31_set_pad(enum iomux_pins pin, u32 config);
+extern void mx31_set_gpr(enum iomux_gp_func gp, char en);
 
 void mx31_uart1_hw_init(void);
+void mx31_uart2_hw_init(void);
 void mx31_spi2_hw_init(void);
 void mxc_hw_watchdog_enable(void);
 void mxc_hw_watchdog_reset(void);
diff --git a/arch/arm/include/asm/arch-mx31/imx-regs.h b/arch/arm/include/asm/arch-mx31/imx-regs.h
index 552c8214e4..afdaa1ce6c 100644
--- a/arch/arm/include/asm/arch-mx31/imx-regs.h
+++ b/arch/arm/include/asm/arch-mx31/imx-regs.h
@@ -468,6 +468,44 @@ enum iomux_pins {
 	MX31_PIN_CAPTURE	= IOMUX_PIN(7,    327),
 };
 
+/*
+ * various IOMUX general purpose functions
+ */
+enum iomux_gp_func {
+	MUX_PGP_FIRI			= 1 << 0,
+	MUX_DDR_MODE			= 1 << 1,
+	MUX_PGP_CSPI_BB			= 1 << 2,
+	MUX_PGP_ATA_1			= 1 << 3,
+	MUX_PGP_ATA_2			= 1 << 4,
+	MUX_PGP_ATA_3			= 1 << 5,
+	MUX_PGP_ATA_4			= 1 << 6,
+	MUX_PGP_ATA_5			= 1 << 7,
+	MUX_PGP_ATA_6			= 1 << 8,
+	MUX_PGP_ATA_7			= 1 << 9,
+	MUX_PGP_ATA_8			= 1 << 10,
+	MUX_PGP_UH2			= 1 << 11,
+	MUX_SDCTL_CSD0_SEL		= 1 << 12,
+	MUX_SDCTL_CSD1_SEL		= 1 << 13,
+	MUX_CSPI1_UART3			= 1 << 14,
+	MUX_EXTDMAREQ2_MBX_SEL		= 1 << 15,
+	MUX_TAMPER_DETECT_EN		= 1 << 16,
+	MUX_PGP_USB_4WIRE		= 1 << 17,
+	MUX_PGP_USB_COMMON		= 1 << 18,
+	MUX_SDHC_MEMSTICK1		= 1 << 19,
+	MUX_SDHC_MEMSTICK2		= 1 << 20,
+	MUX_PGP_SPLL_BYP		= 1 << 21,
+	MUX_PGP_UPLL_BYP		= 1 << 22,
+	MUX_PGP_MSHC1_CLK_SEL		= 1 << 23,
+	MUX_PGP_MSHC2_CLK_SEL		= 1 << 24,
+	MUX_CSPI3_UART5_SEL		= 1 << 25,
+	MUX_PGP_ATA_9			= 1 << 26,
+	MUX_PGP_USB_SUSPEND		= 1 << 27,
+	MUX_PGP_USB_OTG_LOOPBACK	= 1 << 28,
+	MUX_PGP_USB_HS1_LOOPBACK	= 1 << 29,
+	MUX_PGP_USB_HS2_LOOPBACK	= 1 << 30,
+	MUX_CLKO_DDR_MODE		= 1 << 31,
+};
+
 /* Bit definitions for RCSR register in CCM */
 #define CCM_RCSR_NF16B	(1 << 31)
 #define CCM_RCSR_NFMS	(1 << 30)
@@ -484,6 +522,17 @@ struct mx31_weim {
 	struct mx31_weim_cscr cscr[6];
 };
 
+/* ESD control registers */
+struct esdc_regs {
+	u32 ctl0;
+	u32 cfg0;
+	u32 ctl1;
+	u32 cfg1;
+	u32 misc;
+	u32 dly[5];
+	u32 dlyl;
+};
+
 #endif
 
 #define __REG(x)     (*((volatile u32 *)(x)))
@@ -562,6 +611,8 @@ struct mx31_weim {
 #define ESDCTL_BL(x)			((x) << 7)
 #define ESDCTL_PRCT(x)			((x) << 0)
 
+#define ESDCTL_BASE_ADDR	0xB8001000
+
 /* 13 fields of the upper CS control register */
 #define CSCR_U(sp, wp, bcd, bcs, psz, pme, sync, dol, \
 		cnc, wsc, ew, wws, edc) \
@@ -642,12 +693,23 @@ struct mx31_weim {
 
 /* Register offsets based on IOMUXC_BASE */
 /* 0x00 .. 0x7b */
+#define MUX_CTL_CSPI3_MISO		0x0c
+#define MUX_CTL_CSPI3_SCLK		0x0d
+#define MUX_CTL_CSPI3_SPI_RDY	0x0e
+#define MUX_CTL_CSPI3_MOSI		0x13
+
 #define MUX_CTL_USBH2_DATA1	0x40
 #define MUX_CTL_USBH2_DIR	0x44
 #define MUX_CTL_USBH2_STP	0x45
 #define MUX_CTL_USBH2_NXT	0x46
 #define MUX_CTL_USBH2_DATA0	0x47
 #define MUX_CTL_USBH2_CLK	0x4B
+
+#define MUX_CTL_TXD2		0x70
+#define MUX_CTL_RTS2		0x71
+#define MUX_CTL_CTS2		0x72
+#define MUX_CTL_RXD2		0x77
+
 #define MUX_CTL_RTS1		0x7c
 #define MUX_CTL_CTS1		0x7d
 #define MUX_CTL_DTR_DCE1	0x7e
@@ -705,6 +767,11 @@ struct mx31_weim {
 #define MUX_RTS1__UART1_RTS_B	IOMUX_MODE(MUX_CTL_RTS1, MUX_CTL_FUNC)
 #define MUX_CTS1__UART1_CTS_B	IOMUX_MODE(MUX_CTL_CTS1, MUX_CTL_FUNC)
 
+#define MUX_RXD2__UART2_RXD_MUX	IOMUX_MODE(MUX_CTL_RXD2, MUX_CTL_FUNC)
+#define MUX_TXD2__UART2_TXD_MUX	IOMUX_MODE(MUX_CTL_TXD2, MUX_CTL_FUNC)
+#define MUX_RTS2__UART2_RTS_B	IOMUX_MODE(MUX_CTL_RTS2, MUX_CTL_FUNC)
+#define MUX_CTS2__UART2_CTS_B	IOMUX_MODE(MUX_CTL_CTS2, MUX_CTL_FUNC)
+
 #define MUX_CSPI2_SS0__CSPI2_SS0_B IOMUX_MODE(MUX_CTL_CSPI2_SS0, MUX_CTL_FUNC)
 #define MUX_CSPI2_SS1__CSPI2_SS1_B IOMUX_MODE(MUX_CTL_CSPI2_SS1, MUX_CTL_FUNC)
 #define MUX_CSPI2_SS2__CSPI2_SS2_B IOMUX_MODE(MUX_CTL_CSPI2_SS2, MUX_CTL_FUNC)