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| author | Albert ARIBAUD <albert.u.boot@aribaud.net> | 2012-10-27 11:43:17 +0200 |
|---|---|---|
| committer | Albert ARIBAUD <albert.u.boot@aribaud.net> | 2012-10-27 11:43:17 +0200 |
| commit | f04821a8ca714459481bd9fd315af2b5f92d99a6 (patch) | |
| tree | cf5ec812082840d228f67ef82e8be4d647ff3322 /arch/arm/include/asm/arch-mx6/imx-regs.h | |
| parent | b68d6712c379735e886ef9c01b946bc36f295273 (diff) | |
| parent | 01968b96a24414ff8f0735111907cbb750c7af43 (diff) | |
Merge remote-tracking branch 'u-boot-imx/master'
Diffstat (limited to 'arch/arm/include/asm/arch-mx6/imx-regs.h')
| -rw-r--r-- | arch/arm/include/asm/arch-mx6/imx-regs.h | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch-mx6/imx-regs.h b/arch/arm/include/asm/arch-mx6/imx-regs.h index dc737ba127..09ab010138 100644 --- a/arch/arm/include/asm/arch-mx6/imx-regs.h +++ b/arch/arm/include/asm/arch-mx6/imx-regs.h @@ -200,6 +200,12 @@ struct src { u32 gpr10; }; +/* OCOTP Registers */ +struct ocotp_regs { + u32 reserved[0x198]; + u32 gp1; /* 0x660 */ +}; + /* GPR3 bitfields */ #define IOMUXC_GPR3_GPU_DBG_OFFSET 29 #define IOMUXC_GPR3_GPU_DBG_MASK (3<<IOMUXC_GPR3_GPU_DBG_OFFSET) |