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| author | Pierre Aubert <p.aubert@staubli.com> | 2013-09-23 13:37:20 +0200 |
|---|---|---|
| committer | Stefano Babic <sbabic@denx.de> | 2013-09-27 13:53:35 +0200 |
| commit | a0a0dacfe8ff8d7036db823ca5ea9ba393a35187 (patch) | |
| tree | 032cd0b586f6ffb72c0b2387d2639a0d35b04338 /arch/arm/include/asm/arch-mx6/mx6q_pins.h | |
| parent | a05f4ab6cc84a92c02ff1dbe2eb8a70161de4cbb (diff) | |
mx6: Fix use of improper value in enable_ipu_clock
The value MXC_CCM_CCGR3_IPU1_IPU_DI0_OFFSET that was used to initialize
the CCGR3 register caused an undefined value for CG0.
Signed-off-by: Pierre Aubert <p.aubert@staubli.com>
CC: Stefano Babic <sbabic@denx.de>
Acked-by: Eric Nelson <eric.nelson@boundarydevices.com>
Diffstat (limited to 'arch/arm/include/asm/arch-mx6/mx6q_pins.h')
0 files changed, 0 insertions, 0 deletions