omap5: Add minimal support for omap5430.

This patch adds the minimal support for OMAP5. The platform and machine
specific headers and sources updated for OMAP5430.

OMAP5430 is Texas Instrument's SOC based on ARM Cortex-A15 SMP architecture.
It's a dual core SOC with GIC used for interrupt handling and SCU for cache
coherency.

Also moved some part of code from the basic platform support that can be made
common for OMAP4/5. Rest is kept out seperately. The same approach is followed
for clocks and emif support in the subsequent patches.

Signed-off-by: sricharan <r.sricharan@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>

2 files changed, 16 insertions, 25 deletions

diff --git a/arch/arm/include/asm/arch-omap4/omap4.h b/arch/arm/include/asm/arch-omap4/omap.h
index 61ebb3d46d..0ade8961ab 100644
--- a/arch/arm/include/asm/arch-omap4/omap4.h
+++ b/arch/arm/include/asm/arch-omap4/omap.h
@@ -44,7 +44,8 @@
 
 #define OMAP44XX_DRAM_ADDR_SPACE_START	0x80000000
 #define OMAP44XX_DRAM_ADDR_SPACE_END	0xD0000000
-
+#define DRAM_ADDR_SPACE_START	OMAP44XX_DRAM_ADDR_SPACE_START
+#define DRAM_ADDR_SPACE_END	OMAP44XX_DRAM_ADDR_SPACE_END
 
 /* CONTROL */
 #define CTRL_BASE		(OMAP44XX_L4_CORE_BASE + 0x2000)
@@ -57,16 +58,11 @@
 /* CONTROL_ID_CODE */
 #define CONTROL_ID_CODE		0x4A002204
 
-/* 4430 */
-#define OMAP4430_CONTROL_ID_CODE_ES1_0	0x0B85202F
-#define OMAP4430_CONTROL_ID_CODE_ES2_0	0x1B85202F
-#define OMAP4430_CONTROL_ID_CODE_ES2_1	0x3B95C02F
-#define OMAP4430_CONTROL_ID_CODE_ES2_2	0x4B95C02F
-#define OMAP4430_CONTROL_ID_CODE_ES2_3	0x6B95C02F
-
-/* 4460 */
-#define OMAP4460_CONTROL_ID_CODE_ES1_0	0x0B94E02F
-#define OMAP4460_CONTROL_ID_CODE_ES1_1	0x2B94E02F
+#define OMAP4_CONTROL_ID_CODE_ES1_0	0x0B85202F
+#define OMAP4_CONTROL_ID_CODE_ES2_0	0x1B85202F
+#define OMAP4_CONTROL_ID_CODE_ES2_1	0x3B95C02F
+#define OMAP4_CONTROL_ID_CODE_ES2_2	0x4B95C02F
+#define OMAP4_CONTROL_ID_CODE_ES2_3	0x6B95C02F
 
 /* UART */
 #define UART1_BASE		(OMAP44XX_L4_PER_BASE + 0x6a000)
@@ -151,7 +147,7 @@ struct omap4_sys_ctrl_regs {
 	unsigned int control_ldosram_mpu_voltage_ctrl;	/* 0x4A002324 */
 	unsigned int control_ldosram_core_voltage_ctrl;	/* 0x4A002328 */
 	unsigned int pad3[260277];
-	unsigned int control_pbiaslite;			/* 0x4A100600 */
+	unsigned int control_pbiaslite;                 /* 0x4A100600 */
 	unsigned int pad4[63];
 	unsigned int control_efuse_1;			/* 0x4A100700 */
 	unsigned int control_efuse_2;			/* 0x4A100704 */
@@ -188,16 +184,6 @@ struct control_lpddr2io_regs {
 #define OMAP4_SRAM_SCRATCH_EMIF_T_DEN	(SRAM_SCRATCH_SPACE_ADDR + 0x10)
 #define OMAP4_SRAM_SCRATCH_SPACE_END	(SRAM_SCRATCH_SPACE_ADDR + 0x14)
 
-/* Silicon revisions */
-#define OMAP4430_SILICON_ID_INVALID	0xFFFFFFFF
-#define OMAP4430_ES1_0	0x44300100
-#define OMAP4430_ES2_0	0x44300200
-#define OMAP4430_ES2_1	0x44300210
-#define OMAP4430_ES2_2	0x44300220
-#define OMAP4430_ES2_3	0x44300230
-#define OMAP4460_ES1_0	0x44600100
-#define OMAP4460_ES1_1	0x44600110
-
 /* ROM code defines */
 /* Boot device */
 #define BOOT_DEVICE_MASK	0xFF
diff --git a/arch/arm/include/asm/arch-omap4/sys_proto.h b/arch/arm/include/asm/arch-omap4/sys_proto.h
index 1aacbb12e3..4f236875bd 100644
--- a/arch/arm/include/asm/arch-omap4/sys_proto.h
+++ b/arch/arm/include/asm/arch-omap4/sys_proto.h
@@ -21,7 +21,7 @@
 #ifndef _SYS_PROTO_H_
 #define _SYS_PROTO_H_
 
-#include <asm/arch/omap4.h>
+#include <asm/arch/omap.h>
 #include <asm/arch/clocks.h>
 #include <asm/io.h>
 #include <asm/omap_common.h>
@@ -38,11 +38,13 @@ void gpmc_init(void);
 void watchdog_init(void);
 u32 get_device_type(void);
 void do_set_mux(u32 base, struct pad_conf_entry const *array, int size);
+void set_muxconf_regs_essential(void);
 void set_muxconf_regs_non_essential(void);
 void sr32(void *, u32, u32, u32);
 u32 wait_on_value(u32, u32, void *, u32);
 void sdelay(unsigned long);
 void set_pl310_ctrl_reg(u32 val);
+void omap_rev_string(char *omap_rev_string);
 void setup_clocks_for_console(void);
 void prcm_init(void);
 void bypass_dpll(u32 *const base);
@@ -51,7 +53,10 @@ u32 get_sys_clk_freq(void);
 u32 omap4_ddr_clk(void);
 void cancel_out(u32 *num, u32 *den, u32 den_limit);
 void sdram_init(void);
-u32 omap4_sdram_size(void);
+u32 omap_sdram_size(void);
+u32 cortex_rev(void);
+void init_omap_revision(void);
+void do_io_settings(void);
 
 static inline u32 running_from_sdram(void)
 {
@@ -86,7 +91,7 @@ static inline u8 uboot_loaded_by_spl(void)
  * This function finds this context.
  * Defining as inline may help in compiling out unused functions in SPL
  */
-static inline u32 omap4_hw_init_context(void)
+static inline u32 omap_hw_init_context(void)
 {
 #ifdef CONFIG_SPL_BUILD
 	return OMAP_INIT_CONTEXT_SPL;