diff options
| author | SRICHARAN R <r.sricharan@ti.com> | 2013-02-04 04:22:01 +0000 |
|---|---|---|
| committer | Tom Rini <trini@ti.com> | 2013-03-11 11:06:09 -0400 |
| commit | ee9447bfe37a646a8dce182e6f625f27c10512a0 (patch) | |
| tree | ee29ae05ce69c08b3d8c78c96251629dec3118a5 /arch/arm/include/asm/arch-omap5 | |
| parent | 01b753ff7badb5b8670794de3d5dd71e1c4c9baf (diff) | |
ARM: OMAP4+: Cleanup the clocks layer
Currently there is quite a lot of code which
is duplicated in the clocks code for OMAP 4 and 5
Socs. Avoiding this here by moving the clocks
data to a SOC specific place and the sharing the
common code.
This helps in addition of a new Soc with minimal
changes.
Signed-off-by: R Sricharan <r.sricharan@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@ti.com>
Diffstat (limited to 'arch/arm/include/asm/arch-omap5')
| -rw-r--r-- | arch/arm/include/asm/arch-omap5/clocks.h | 50 | ||||
| -rw-r--r-- | arch/arm/include/asm/arch-omap5/omap.h | 3 |
2 files changed, 2 insertions, 51 deletions
diff --git a/arch/arm/include/asm/arch-omap5/clocks.h b/arch/arm/include/asm/arch-omap5/clocks.h index 67e74ca402..063347f69e 100644 --- a/arch/arm/include/asm/arch-omap5/clocks.h +++ b/arch/arm/include/asm/arch-omap5/clocks.h @@ -234,58 +234,8 @@ #define DPLL_NO_LOCK 0 #define DPLL_LOCK 1 -#define NUM_SYS_CLKS 7 - -struct dpll_regs { - u32 cm_clkmode_dpll; - u32 cm_idlest_dpll; - u32 cm_autoidle_dpll; - u32 cm_clksel_dpll; - u32 cm_div_m2_dpll; - u32 cm_div_m3_dpll; - u32 cm_div_h11_dpll; - u32 cm_div_h12_dpll; - u32 cm_div_h13_dpll; - u32 cm_div_h14_dpll; - u32 reserved[3]; - u32 cm_div_h22_dpll; - u32 cm_div_h23_dpll; -}; - -/* DPLL parameter table */ -struct dpll_params { - u32 m; - u32 n; - s8 m2; - s8 m3; - s8 h11; - s8 h12; - s8 h13; - s8 h14; - s8 h22; - s8 h23; -}; - -extern const u32 sys_clk_array[8]; - void scale_vcores(void); void do_scale_tps62361(int gpio, u32 reg, u32 volt_mv); u32 get_offset_code(u32 offset); -u32 omap_ddr_clk(void); void do_scale_vcore(u32 vcore_reg, u32 volt_mv); -void setup_post_dividers(u32 const base, const struct dpll_params *params); -u32 get_sys_clk_index(void); -void enable_basic_clocks(void); -void enable_non_essential_clocks(void); -void enable_basic_uboot_clocks(void); -void do_enable_clocks(u32 const *clk_domains, - u32 const *clk_modules_hw_auto, - u32 const *clk_modules_explicit_en, - u8 wait_for_enable); -const struct dpll_params *get_mpu_dpll_params(void); -const struct dpll_params *get_core_dpll_params(void); -const struct dpll_params *get_per_dpll_params(void); -const struct dpll_params *get_iva_dpll_params(void); -const struct dpll_params *get_usb_dpll_params(void); -const struct dpll_params *get_abe_dpll_params(void); #endif /* _CLOCKS_OMAP5_H_ */ diff --git a/arch/arm/include/asm/arch-omap5/omap.h b/arch/arm/include/asm/arch-omap5/omap.h index 50e055ec67..7123694045 100644 --- a/arch/arm/include/asm/arch-omap5/omap.h +++ b/arch/arm/include/asm/arch-omap5/omap.h @@ -272,7 +272,8 @@ struct omap_sys_ctrl_regs { #define OMAP5_SRAM_SCRATCH_EMIF_T_NUM (SRAM_SCRATCH_SPACE_ADDR + 0xC) #define OMAP5_SRAM_SCRATCH_EMIF_T_DEN (SRAM_SCRATCH_SPACE_ADDR + 0x10) #define OMAP_SRAM_SCRATCH_PRCM_PTR (SRAM_SCRATCH_SPACE_ADDR + 0x14) -#define OMAP5_SRAM_SCRATCH_SPACE_END (SRAM_SCRATCH_SPACE_ADDR + 0x18) +#define OMAP_SRAM_SCRATCH_DPLLS_PTR (SRAM_SCRATCH_SPACE_ADDR + 0x18) +#define OMAP5_SRAM_SCRATCH_SPACE_END (SRAM_SCRATCH_SPACE_ADDR + 0x1C) /* Silicon revisions */ #define OMAP4430_SILICON_ID_INVALID 0xFFFFFFFF |