diff options
| author | Wolfgang Denk <wd@denx.de> | 2011-12-12 07:58:58 +0100 |
|---|---|---|
| committer | Wolfgang Denk <wd@denx.de> | 2011-12-12 07:58:58 +0100 |
| commit | b2eb7d9bc6032e16b7dd898f7c0ea654f63b61db (patch) | |
| tree | b8b649483183d93dedfcb5512d0b9720aa91644f /arch/arm/include/asm/arch-pxa/pxa-regs.h | |
| parent | 4f1a2cd1637027f31de7796aedb1fa5fc0ec0f97 (diff) | |
| parent | d98d8bc1c913a5a1aea6b17365f90c430d1fc95a (diff) | |
Merge branch 'master' of git://git.denx.de/u-boot-usb
* 'master' of git://git.denx.de/u-boot-usb:
USB: efikamx: Enable USB on EfikaMX and EfikaSB
USB: Add generic ULPI layer and a viewport
USB: EHCI: Allow EHCI post-powerup configuration in board files
USB: mx51evk: add end enable USB host support on port 1
USB: mx53loco: add end enable USB host support on port 1
USB: MX5: Add MX5 usb post-init callback
USB: MX5: Abstract out mx51 USB pixmux configuration
USB: MX5: add generic USB EHCI support for mx51 and mx53
USB: MX5: add helper functions to enable USB clocks
usb:gadget:s5p Enable the USB Gadget framework at GONI
usb:gadget:s5p USB Device Controller (UDC) implementation
ehci: speed up initialization
usb: add help for missing start subcommand
cosmetic: remove excess whitespace from usb command help
usb: align usb_endpoint_descriptor to 16-bit boundary
usbtty: init endpoints prior to startup events
pxa: convert pxa27x_udc to use read and write functions
pxa: activate the first usb host port on pxa27x by default
pxa: fix usb host register mismatch
ehci-fsl: correct size of ehci caplength
USB: Add usb_event_poll() to get keyboards working with EHCI
USB: gadaget: add Marvell controller support
USB: Fix complaints about strict aliasing in OHCI-HCD
USB: Drop dead code from usb_kbd.c
USB: Rework usb_kbd.c
USB: Add functionality to poll the USB keyboard via control EP
Diffstat (limited to 'arch/arm/include/asm/arch-pxa/pxa-regs.h')
| -rw-r--r-- | arch/arm/include/asm/arch-pxa/pxa-regs.h | 10 |
1 files changed, 6 insertions, 4 deletions
diff --git a/arch/arm/include/asm/arch-pxa/pxa-regs.h b/arch/arm/include/asm/arch-pxa/pxa-regs.h index 8527c68c81..b81b42c07c 100644 --- a/arch/arm/include/asm/arch-pxa/pxa-regs.h +++ b/arch/arm/include/asm/arch-pxa/pxa-regs.h @@ -645,7 +645,7 @@ typedef void (*ExcpHndlr) (void) ; #define UDCOTGICR_IEIDR (1 << 1) /* OTG ID Change Rising Edge Interrupt Enable */ #define UDCOTGICR_IEIDF (1 << 0) /* OTG ID Change Falling Edge Interrupt Enable */ -#define UDCCSN(x) __REG2(0x40600100, (x) << 2) +#define UDCCSN(x) (0x40600100 + ((x) << 2)) #define UDCCSR0 0x40600100 /* UDC Control/Status register - Endpoint 0 */ #define UDCCSR0_SA (1 << 7) /* Setup Active */ @@ -693,7 +693,7 @@ typedef void (*ExcpHndlr) (void) ; #define UDCCSR_PC (1 << 1) /* Packet Complete */ #define UDCCSR_FS (1 << 0) /* FIFO needs service */ -#define UDCBCN(x) __REG2(0x40600200, (x)<<2) +#define UDCBCN(x) (0x40600200 + ((x) << 2)) #define UDCBCR0 0x40600200 /* Byte Count Register - EP0 */ #define UDCBCRA 0x40600204 /* Byte Count Register - EPA */ #define UDCBCRB 0x40600208 /* Byte Count Register - EPB */ @@ -719,7 +719,7 @@ typedef void (*ExcpHndlr) (void) ; #define UDCBCRW 0x40600258 /* Byte Count Register - EPW */ #define UDCBCRX 0x4060025C /* Byte Count Register - EPX */ -#define UDCDN(x) __REG2(0x40600300, (x)<<2) +#define UDCDN(x) (0x40600300 + ((x) << 2)) #define UDCDR0 0x40600300 /* Data Register - EP0 */ #define UDCDRA 0x40600304 /* Data Register - EPA */ #define UDCDRB 0x40600308 /* Data Register - EPB */ @@ -745,7 +745,7 @@ typedef void (*ExcpHndlr) (void) ; #define UDCDRW 0x40600358 /* Data Register - EPW */ #define UDCDRX 0x4060035C /* Data Register - EPX */ -#define UDCCN(x) __REG2(0x40600400, (x)<<2) +#define UDCCN(x) (0x40600400 + ((x) << 2)) #define UDCCRA 0x40600404 /* Configuration register EPA */ #define UDCCRB 0x40600408 /* Configuration register EPB */ #define UDCCRC 0x4060040C /* Configuration register EPC */ @@ -835,6 +835,8 @@ typedef void (*ExcpHndlr) (void) ; #define UHCHIE 0x4C000068 #define UHCHIT 0x4C00006C +#define UHCCOMS_HCR (1<<0) + #define UHCHR_FSBIR (1<<0) #define UHCHR_FHR (1<<1) #define UHCHR_CGR (1<<2) |