diff options
author | Tom Rini <trini@konsulko.com> | 2017-08-14 10:40:01 -0400 |
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committer | Tom Rini <trini@konsulko.com> | 2017-08-14 10:40:01 -0400 |
commit | c1b62ba9ca0e41fdd548cb3bb9af3b3f90d4a393 (patch) | |
tree | 7e653a1823011bfb075540428bfdab96707f1517 /arch/arm/include/asm/arch-rockchip/cru_rk3368.h | |
parent | bc5d0384458466ed5b3608d326eec03cd4f13016 (diff) | |
parent | 217273cd441fe3d00a1bdad143dcb656854963f9 (diff) |
Merge branch 'master' of git://git.denx.de/u-boot-rockchip
Diffstat (limited to 'arch/arm/include/asm/arch-rockchip/cru_rk3368.h')
-rw-r--r-- | arch/arm/include/asm/arch-rockchip/cru_rk3368.h | 15 |
1 files changed, 11 insertions, 4 deletions
diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk3368.h b/arch/arm/include/asm/arch-rockchip/cru_rk3368.h index 24a9cc0525..2b1197fd46 100644 --- a/arch/arm/include/asm/arch-rockchip/cru_rk3368.h +++ b/arch/arm/include/asm/arch-rockchip/cru_rk3368.h @@ -89,19 +89,26 @@ enum { MCU_CLK_DIV_SHIFT = 0, MCU_CLK_DIV_MASK = GENMASK(4, 0), + /* CLKSEL43_CON */ + GMAC_MUX_SEL_EXTCLK = BIT(8), + /* CLKSEL51_CON */ MMC_PLL_SEL_SHIFT = 8, MMC_PLL_SEL_MASK = GENMASK(9, 8), - MMC_PLL_SEL_CPLL = 0, - MMC_PLL_SEL_GPLL, - MMC_PLL_SEL_USBPHY_480M, - MMC_PLL_SEL_24M, + MMC_PLL_SEL_CPLL = (0 << MMC_PLL_SEL_SHIFT), + MMC_PLL_SEL_GPLL = (1 << MMC_PLL_SEL_SHIFT), + MMC_PLL_SEL_USBPHY_480M = (2 << MMC_PLL_SEL_SHIFT), + MMC_PLL_SEL_24M = (3 << MMC_PLL_SEL_SHIFT), MMC_CLK_DIV_SHIFT = 0, MMC_CLK_DIV_MASK = GENMASK(6, 0), /* SOFTRST1_CON */ MCU_PO_SRST_MASK = BIT(13), MCU_SYS_SRST_MASK = BIT(12), + DMA1_SRST_REQ = BIT(2), + + /* SOFTRST4_CON */ + DMA2_SRST_REQ = BIT(0), /* GLB_RST_CON */ PMU_GLB_SRST_CTRL_SHIFT = 2, |