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authorKever Yang <kever.yang@rock-chips.com>2016-10-07 17:47:58 +0800
committerSimon Glass <sjg@chromium.org>2016-10-30 13:29:06 -0600
commit7d6c78f5731e71c7619c621c4c7e30c56f0fd9bf (patch)
tree4c625fc65da0c6b9b310569d8ac1293265f2cf05 /arch/arm/include/asm/arch-rockchip/sdram.h
parentcd2f6b8b956735081fec3ad3859e7d7ecf0877c3 (diff)
rk3288: sdram: auto-detect the capacity
Add support for rk3288 dram capacity auto detect, support DDR3 and LPDDR3, DDR2 is not supported. The program will automatically detect: - channel number - rank number - column address number - row address number The dts file do not need to describe those info after apply this patch. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Simon Glass <sjg@chromium.org> Tested-by: Vagrant Cascadian <vagrant@debian.org> Tested-by: Vagrant Cascadian <vagrant@debian.org>
Diffstat (limited to 'arch/arm/include/asm/arch-rockchip/sdram.h')
-rw-r--r--arch/arm/include/asm/arch-rockchip/sdram.h15
1 files changed, 15 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch-rockchip/sdram.h b/arch/arm/include/asm/arch-rockchip/sdram.h
index 82c3d07cbb..d7d67baa68 100644
--- a/arch/arm/include/asm/arch-rockchip/sdram.h
+++ b/arch/arm/include/asm/arch-rockchip/sdram.h
@@ -16,6 +16,11 @@ enum {
};
struct rk3288_sdram_channel {
+ /*
+ * bit width in address, eg:
+ * 8 banks using 3 bit to address,
+ * 2 cs using 1 bit to address.
+ */
u8 rank;
u8 col;
u8 bk;
@@ -87,6 +92,16 @@ struct rk3288_base_params {
u32 ddrconfig;
u32 ddr_freq;
u32 dramtype;
+ /*
+ * DDR Stride is address mapping for DRAM space
+ * Stride Ch 0 range Ch1 range Total
+ * 0x00 0-256MB 256MB-512MB 512MB
+ * 0x05 0-1GB 0-1GB 1GB
+ * 0x09 0-2GB 0-2GB 2GB
+ * 0x0d 0-4GB 0-4GB 4GB
+ * 0x17 N/A 0-4GB 4GB
+ * 0x1a 0-4GB 4GB-8GB 8GB
+ */
u32 stride;
u32 odt;
};