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authorDinh Nguyen <dinguyen@altera.com>2012-10-04 06:46:02 +0000
committerAlbert ARIBAUD <albert.u.boot@aribaud.net>2012-10-04 18:11:52 +0200
commit777544085d2b417a36df50eb564bf037a044e60e (patch)
tree3a27c138d248a5dee8579570f0fd852f1f4d62ee /arch/arm/include/asm/arch-socfpga/timer.h
parent1acc5559d9c3f45b4243474fe61ec3cab8d23f7a (diff)
ARM: Add Altera SOCFPGA Cyclone5
Add minimal support for Altera's SOCFPGA Cyclone 5 hardware. Signed-off-by: Dinh Nguyen <dinguyen@altera.com> Signed-off-by: Chin Liang See <clsee@altera.com> Signed-off-by: Pavel Machek <pavel@denx.de> Reviewed-by: Marek Vasut <marex@denx.de> Acked-by: Tom Trini <trini@ti.com> Cc: Wolfgang Denx <wd@denx.de> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Stefan Roese <sr@denx.de> ---- v8: Remove no_return attribute for reset_cpu Based on v2012.10-rc2
Diffstat (limited to 'arch/arm/include/asm/arch-socfpga/timer.h')
-rw-r--r--arch/arm/include/asm/arch-socfpga/timer.h29
1 files changed, 29 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch-socfpga/timer.h b/arch/arm/include/asm/arch-socfpga/timer.h
new file mode 100644
index 0000000000..830c94a275
--- /dev/null
+++ b/arch/arm/include/asm/arch-socfpga/timer.h
@@ -0,0 +1,29 @@
+/*
+ * Copyright (C) 2012 Altera Corporation <www.altera.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef _SOCFPGA_TIMER_H_
+#define _SOCFPGA_TIMER_H_
+
+struct socfpga_timer {
+ u32 load_val;
+ u32 curr_val;
+ u32 ctrl;
+ u32 eoi;
+ u32 int_stat;
+};
+
+#endif