diff options
| author | Dinh Nguyen <dinguyen@opensource.altera.com> | 2015-03-30 17:01:04 -0500 |
|---|---|---|
| committer | Marek Vasut <marex@denx.de> | 2015-04-21 12:23:16 +0200 |
| commit | c218f85ea18d57beecc36a3460f08e929d81fcd6 (patch) | |
| tree | 571883d5c89a89ec5ef17b3b1c3835748d9c94c9 /arch/arm/include/asm/arch-socfpga | |
| parent | 6868160ab1b55252206b983ef86770e4f778ec45 (diff) | |
arm: socfpga: add functions to bring sdram, timer, and uart out of reset
These functions will be needed for use by the SPL for enabling the
console and sdram initialization.
Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
Acked-by: Marek Vasut <marex@denx.de>
Acked-by: Pavel Machek <pavel@denx.de>
Diffstat (limited to 'arch/arm/include/asm/arch-socfpga')
| -rw-r--r-- | arch/arm/include/asm/arch-socfpga/reset_manager.h | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch-socfpga/reset_manager.h b/arch/arm/include/asm/arch-socfpga/reset_manager.h index 034135bff4..d63a285091 100644 --- a/arch/arm/include/asm/arch-socfpga/reset_manager.h +++ b/arch/arm/include/asm/arch-socfpga/reset_manager.h @@ -15,6 +15,9 @@ void socfpga_bridges_reset(int enable); void socfpga_emac_reset(int enable); void socfpga_watchdog_reset(void); void socfpga_spim_enable(void); +void socfpga_uart0_enable(void); +void socfpga_sdram_enable(void); +void socfpga_osc1timer_enable(void); struct socfpga_reset_manager { u32 status; @@ -36,7 +39,10 @@ struct socfpga_reset_manager { #define RSTMGR_PERMODRST_EMAC0_LSB 0 #define RSTMGR_PERMODRST_EMAC1_LSB 1 #define RSTMGR_PERMODRST_L4WD0_LSB 6 +#define RSTMGR_PERMODRST_OSC1TIMER0_LSB 8 +#define RSTMGR_PERMODRST_UART0_LSB 16 #define RSTMGR_PERMODRST_SPIM0_LSB 18 #define RSTMGR_PERMODRST_SPIM1_LSB 19 +#define RSTMGR_PERMODRST_SDR_LSB 29 #endif /* _RESET_MANAGER_H_ */ |