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authorHans de Goede <hdegoede@redhat.com>2015-08-08 14:05:35 +0200
committerHans de Goede <hdegoede@redhat.com>2015-08-14 08:37:39 +0200
commit55ea98d8b1a1aacd3af5978a504d956d7a85ffed (patch)
tree2213b315237b9d347c0bb675b8559289df3aee28 /arch/arm/include/asm/arch-sunxi/clock_sun4i.h
parent49043cbad1db2e97daffe54d5ee32103c11dd4fd (diff)
sun6i: clock: Add support for the mipi pll
Add support for the mipi pll, this is necessary for getting higher dotclocks with lcd panels. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
Diffstat (limited to 'arch/arm/include/asm/arch-sunxi/clock_sun4i.h')
-rw-r--r--arch/arm/include/asm/arch-sunxi/clock_sun4i.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch-sunxi/clock_sun4i.h b/arch/arm/include/asm/arch-sunxi/clock_sun4i.h
index 1a0b5251a0..0088bb9d0b 100644
--- a/arch/arm/include/asm/arch-sunxi/clock_sun4i.h
+++ b/arch/arm/include/asm/arch-sunxi/clock_sun4i.h
@@ -289,6 +289,7 @@ struct sunxi_ccm_reg {
#define CCM_LCD_CH0_CTRL_PLL7 (1 << 24)
#define CCM_LCD_CH0_CTRL_PLL3_2X (2 << 24)
#define CCM_LCD_CH0_CTRL_PLL7_2X (3 << 24)
+#define CCM_LCD_CH0_CTRL_MIPI_PLL 0 /* No mipi pll on sun4i/5i/7i */
#ifdef CONFIG_MACH_SUN5I
#define CCM_LCD_CH0_CTRL_TVE_RST (0x1 << 29)
#else