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| author | Tom Rini <trini@konsulko.com> | 2017-11-28 16:54:09 -0500 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2017-11-28 16:54:09 -0500 |
| commit | 74a4818415852560b43ee990ce47c68582bef4ca (patch) | |
| tree | feedbc26cb649c64301d810fd163ce7af0e77d7c /arch/arm/include/asm/arch-sunxi/dram_sunxi_dw.h | |
| parent | 65972a0b6204aa298b70b7ebd755bb1ce1ed53ee (diff) | |
| parent | a27bcbf81563880a1cfc805625dc57dbde658e1d (diff) | |
Merge git://git.denx.de/u-boot-uniphier
Diffstat (limited to 'arch/arm/include/asm/arch-sunxi/dram_sunxi_dw.h')
| -rw-r--r-- | arch/arm/include/asm/arch-sunxi/dram_sunxi_dw.h | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/arch/arm/include/asm/arch-sunxi/dram_sunxi_dw.h b/arch/arm/include/asm/arch-sunxi/dram_sunxi_dw.h index 03fd46b724..66e206dd52 100644 --- a/arch/arm/include/asm/arch-sunxi/dram_sunxi_dw.h +++ b/arch/arm/include/asm/arch-sunxi/dram_sunxi_dw.h @@ -13,6 +13,8 @@ #ifndef _SUNXI_DRAM_SUN8I_H3_H #define _SUNXI_DRAM_SUN8I_H3_H +#include <linux/bitops.h> + struct sunxi_mctl_com_reg { u32 cr; /* 0x00 control register */ u32 cr_r1; /* 0x04 rank 1 control register (R40 only) */ @@ -211,7 +213,6 @@ struct sunxi_mctl_ctl_reg { * the 32-bit wide access consists of. Also three control signals can be * adjusted individually. */ -#define BITS_PER_BYTE 8 #define NR_OF_BYTE_LANES (32 / BITS_PER_BYTE) /* The eight data lines (DQn) plus DM, DQS and DQSN */ #define LINES_PER_BYTE_LANE (BITS_PER_BYTE + 3) |